Quantum Circuit Parity Checks With Classical Feedback for Error Mitigation

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Solution Overview

Problem

Quantum algorithms for optimization, such as portfolio optimization, often fail to reach optimal solutions due to hardware noise, requiring costly error mitigation techniques that involve full execution of quantum circuits before data processing can discard bad data.

Innovation Solution

Implementing parity checks and classical feedback mechanisms in quantum circuit execution, allowing for early detection and termination of errors, thereby conserving quantum computing resources by restarting the execution instead of completing the full process.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error mitigation techniques are used to discard bad or corrupted data, then solution quality is improved, but execution time and cost increase

Engineering Contradiction:
Improvesolution qualityVSAvoidexecution time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing parity checks at intermediate measurement points during quantum circuit execution, before the full execution completes. This allows early detection of errors so that bad computations can be terminated early rather than completing full executions, thus maintaining solution quality while reducing time loss

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback by continuously monitoring parity measurements during quantum circuit execution and using this information to dynamically control whether to continue or terminate the computation. The classical system receives parity results and feeds back termination decisions to the quantum system, enabling real-time error mitigation that balances solution quality with execution efficiency

Inventive Principle:
Principle #23Feedback

2Measurement precision

If full quantum circuit execution is completed before data processing, then error detection accuracy is improved, but resource consumption increases

Engineering Contradiction:
Improveerror detection accuracyVSAvoidresource consumption
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent performs preliminary parity checks at intermediate points during quantum circuit execution rather than waiting for full completion. This maintains error detection capability while allowing early termination of computations that show errors, thereby reducing quantum resource consumption without sacrificing detection accuracy

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the quantum circuit execution into multiple measurement points where parity checks are performed at intermediate stages. This segmentation allows error detection to occur at multiple checkpoints, maintaining high detection accuracy while enabling early termination of failed computations to conserve resources

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12093128B2Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback
Publication Date: 2024.09.17 JPMORGAN CHASE BANK NA
  • US12093128B2 patent drawing
  • US12093128B2 patent drawing
  • US12093128B2 patent drawing

AI summary

Systems and methods for efficient error mitigation in quantum circuit execution using parity checks and classical feedback are disclosed. A method may include a quantum computer: executing a quantum optimization algorithm comprising measurement points for measuring a quantum state parity, and termination instructions for stopping execution of the quantum optimization algorithm; preparing the quantum state; executing a first step of the quantum optimization algorithm; measuring a first parity of the quantum state; returning the first parity to a classical computer program; executing a second step of the quantum optimization algorithm; measuring a second parity of the quantum state; returning the second parity to the classical computer program that is configured to compare the first parity and the second parity; receiving an instruction to execute the termination instructions from the classical computer program in response to first parity and the second parity being different; and executing the termination instructions.