Quantum Processor Patch Characterization via Neighboring Gate Sequences
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Solution Overview
Problem
Current methods for characterizing implementation errors in quantum processors are computationally intractable for systems with more than a few qubits, particularly due to cross-talk errors between characterized patches and their neighborhoods, which lead to systematic estimation errors known as patching errors.
Innovation Solution
The method involves using novel neighboring gate sequences applied to qubits outside a characterized patch to reduce sensitivity to implementation errors from the environment, combined with standard characterization gate sequences, enabling detailed and high-resolution characterization of implementation errors within the patch while minimizing patching errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If patch-based characterization protocols are used to make characterization computationally tractable, then computational resources are reduced, but systematic patching errors are introduced due to cross-talk between the patch and its neighborhood
Solution Approach 1:
The patent segments the quantum processor into multiple patches, each containing a subset of qubits. By characterizing each patch independently while accounting for neighborhood interactions, the method makes the otherwise intractable many-qubit characterization problem manageable. This segmentation allows computational resources to be distributed across smaller, more manageable units while maintaining overall system accuracy.
Solution Approach 2:
The patent introduces neighboring gate sequences as an intermediary mechanism that acts on qubits outside the characterized patch. These sequences serve as mediators to cancel out cross-talk errors between the patch and its neighborhood, effectively isolating the patch from harmful external interactions while maintaining computational tractability.
2Measurement precision
If standard characterization gate sequences are applied to a qubit patch, then implementation errors within the patch can be characterized, but cross-talk errors from neighboring qubits cannot be captured
Solution Approach 1:
The patent applies preliminary anti-action by using neighboring gate sequences to pre-cancel the harmful cross-talk effects before they can corrupt the measurement. These sequences are designed to counteract the specific cross-talk patterns expected in the neighborhood, thereby protecting the patch characterization from external interference while maintaining high resolution.
Solution Approach 2:
The patent performs preliminary action by characterizing not only the patch qubits but also the neighboring qubits that interact with the patch. This preliminary characterization of the neighborhood allows the method to account for and compensate for cross-talk effects, enabling accurate patch characterization even in the presence of neighborhood interactions.
3Measurement precision
If gate set tomography is used to achieve high resolution characterization, then detailed error information is obtained, but quantum and classical resources become excessively large
Solution Approach 1:
The patent segments the full gate set tomography into patch-level characterizations. Instead of performing resource-intensive full-device GST, the method applies GST to smaller patches independently. This segmentation maintains the detailed error characterization capability while dramatically reducing the total quantum and classical resources required, as each patch can be characterized with fewer resources than the full device.
Solution Approach 2:
The patent applies partial action by characterizing only the essential patch regions and their immediate neighborhoods rather than the entire device. This selective characterization approach provides sufficient error information for practical purposes while avoiding the excessive resource consumption of complete device characterization, achieving a balance between detail and efficiency.
Data Source
AI summary
The present disclosure provides a method for characterizing a quantum processor including a plurality of qubits. The method comprising applying a characterization protocol to a qubit patch including a subset of qubits. The characterization protocol includes the reduction of ‘patching errors’—systematic characterization errors occurring due to interactions between qubits inside the patch and qubits outside the patch.