Quantum Processor Simulation With Digital QPU Connectivity Models

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Solution Overview

Problem

The limited availability and high resource intensity of quantum processors, along with the inefficiencies in manual validation and calibration methods, hinder the development and testing of quantum computing systems, leading to delays and errors in processor design and calibration.

Innovation Solution

A digital processor implementing a Quantum Processing Unit (QPU) model simulates a quantum processor, allowing for the generation and validation of device connectivity representations without requiring a physical quantum processor, through the use of a device connectivity representation and a representation model to compute responses based on waveform and physical parameter values.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If quantum processors are used for testing and calibration, then accurate quantum system validation is achieved, but resource availability and access efficiency deteriorate due to limited quantum processor availability and high resource intensity

Engineering Contradiction:
Improvequantum system validation accuracyVSAvoidprocessor access efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent creates a digital representation (copy) of the quantum processor that includes qubit models, coupler models, and device connectivity information. This digital model allows testing and calibration operations to be performed on the copy rather than the physical quantum processor, eliminating resource conflicts while maintaining validation accuracy. The digital waveform representation and simulated responses mirror the behavior of the actual quantum system.

Inventive Principle:
Principle #26Copying

2Manufacturing precision

If manual validation and calibration methods are used, then quantum processor design is tested, but time consumption and error rates increase due to manual operation inefficiencies

Engineering Contradiction:
Improveprocessor design validationVSAvoidvalidation and calibration time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The patent replaces manual validation and calibration operations with an automated digital simulation system. The digital processor executes validation logic and calibration algorithms on the digital quantum processor model, eliminating manual intervention. This substitution maintains design validation precision while dramatically reducing time consumption through automated waveform generation, response simulation, and result analysis.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Manufacturing precision

If physical quantum processors are required for design testing, then accurate hardware validation is achieved, but development flexibility and iteration speed deteriorate due to resource constraints

Engineering Contradiction:
Improvehardware validation accuracyVSAvoiddesign iteration flexibility
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The patent implements a dynamic digital representation of the quantum processor that can be easily modified to test different design configurations. The device connectivity representation, qubit models, and coupler models can be updated without physical reconfiguration, enabling rapid design iteration. The system maintains hardware validation accuracy by simulating quantum mechanical behavior while providing the flexibility to explore multiple design variants.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12373719B2Systems and methods for simulating a quantum processor
Publication Date: 2025.07.29 D WAVE SYSTEMS INC
  • US12373719B2 patent drawing
  • US12373719B2 patent drawing
  • US12373719B2 patent drawing

AI summary

A digital processor simulates a quantum computing system by implementing a QPU model including a set of representation models and a device connectivity representation to simulate a quantum processor design or a physical quantum processor. The digital processor receives an analog waveform and generates a digital waveform representation comprising a set of waveform values that correspond to biases applied to programmable devices in a quantum processor. The digital processor selects a subset of waveform values based on channels in the device connectivity representation. The digital processor implements a representation model to compute a response based on the waveform values and a plurality of physical parameter values, the physical parameters characterizing a programmable device in a quantum processor. The device connectivity representation can be generated from a design implementation, validated against a set of rules, and adjusted to change the device connectivity representation until all of the rules are passed.