Quantum Pulse Control With Interpolation for Mixed-Length Sequences

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Solution Overview

Problem

Existing quantum control systems are inflexible, complex, and unable to efficiently generate pulse sequences that include both long and short pulses, limiting the scalability and dynamic control of quantum devices.

Innovation Solution

A method and system that utilizes programmable logic devices with fast onboard block RAM to store and efficiently generate pulse sequences by upsampling digital signals at varying rates, allowing for dynamic formation of both short and long pulses, including interpolation filters to match the DAC sampling rate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a high-speed DAC is used to generate short pulses, then the pulse generation speed and accuracy is improved, but the memory requirements increase significantly

Engineering Contradiction:
Improvepulse generation accuracyVSAvoidmemory capacity
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The pulse sequence is divided into multiple segments, each stored in a separate memory block. The FPGA sequentially accesses these blocks to reconstruct the complete pulse sequence, thereby reducing the memory burden on any single memory component while maintaining the ability to generate high-speed pulses.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system transitions from a single-dimension memory architecture to a multi-dimensional architecture by introducing time-sequential memory block access. Pulses are distributed across multiple memory blocks and retrieved in a specific sequence, effectively using the time dimension to manage memory resources efficiently.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Manufacturing precision

If pulse sequences are stored in advance in large memory, then the completeness and accuracy of pulse sequences is improved, but the system flexibility and dynamic adjustment capability deteriorates

Engineering Contradiction:
Improvepulse sequence accuracyVSAvoiddynamic control capability
Core Design Contradiction:
Manufacturing precisionVSAdaptability or versatility

Solution Approach 1:

The system employs dynamic memory block selection and sequential access control, allowing the pulse sequence generation to be adjusted in real-time. The FPGA can dynamically configure which memory blocks to access and in what sequence, enabling flexible modification of pulse sequences while maintaining high precision through the structured memory architecture.

Inventive Principle:
Principle #15Dynamics

3Quantity of substance

If SDRAM memory is used to store digital pulse signals, then the storage capacity is improved, but the random-access time increases significantly

Engineering Contradiction:
Improvestorage capacityVSAvoidmemory access speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The pulse sequence data is segmented and distributed across multiple memory blocks within the FPGA. This segmentation allows for parallel preloading of different blocks and sequential access during pulse generation, effectively reducing the random-access time penalty while maintaining adequate storage capacity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Memory blocks are preloaded with pulse sequence data before the actual pulse generation begins. This preliminary action allows the system to prepare data in advance, reducing the need for slow random-access operations during critical pulse generation periods and improving overall access speed.

Inventive Principle:
Principle #10Preliminary action

4Speed

If onboard FPGA block RAM is used, then the memory access speed is improved, but the available storage capacity is limited

Engineering Contradiction:
Improvememory access speedVSAvoidmemory capacity
Core Design Contradiction:
SpeedVSQuantity of substance

Solution Approach 1:

The system merges multiple small memory blocks within the FPGA to create a larger effective storage capacity. By combining the storage resources of several blocks and accessing them in a coordinated sequential manner, the system achieves both the fast access speeds of onboard RAM and the increased capacity needed for complex pulse sequences.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentEP4147356B1Dynamic control for a quantum computer
Publication Date: 2026.02.18 QBLOX BV
  • EP4147356B1 patent drawingFigure 1A~1B
  • EP4147356B1 patent drawingFigure 2A~2C
  • EP4147356B1 patent drawingFigure 3A

AI summary

Methods and apparatus for dynamically controlling a quantum computer are described wherein the method includes selecting a first and second digital pulse signal stored in a memory, the first digital pulse signal having a first pulse shape and a first sample rate and the second digital pulse signal having a second pulse shape and a second sample rate, at least the first or the second sample rate being lower than an output sampling rate of a digital-to-analog converter (DAC); forming a digital pulse sequence signal, the forming including applying a first interpolation algorithm to determine a first upsampled digital pulse signal based on the first digital signal and a second interpolation algorithm to determine a second upsampled digital pulse signal based on the second digital signal, the sample rates of the first and second upsampled digital signals matching the sample rate of the DAC; and, providing the digital pulse sequence signal comprising the first and second upsampled digital pulse signals to an input of the DAC to transform the first and second upsampled digital signals into an analog pulse sequence signal for controlling the quantum device.