Quantum Wire Stressors for Semiconductor Device Performance
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Solution Overview
Problem
The complexity and process control difficulties in semiconductor fabrication increase with the use of epitaxial stressors due to dislocation defects caused by lattice mismatch, which reduces strain stress and hampers the improvement of device performance.
Innovation Solution
A semiconductor device design featuring source and drain stressors formed by quantum wires, where the first quantum wire includes a first semiconductor material and a second semiconductor material with a larger lattice constant, and the second quantum wire is made of 100% second semiconductor material, providing effective stress to the channel region and avoiding dislocation defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If epitaxial SiGe layers with higher Ge concentration are used as stressors, then device performance is improved, but dislocation defects occur due to lattice mismatch
Solution Approach 1:
The patent changes the material composition parameter by using SiGe quantum dots with varying Ge concentrations (30-70% Ge) instead of uniform epitaxial layers. This allows optimization of stress generation while controlling dislocation formation through quantum confinement effects in the dot structure.
Solution Approach 2:
The patent transitions from two-dimensional epitaxial layers to zero-dimensional quantum dots, fundamentally changing the stressor geometry. This dimensional reduction eliminates the continuous lattice mismatch problem of epitaxial growth while maintaining stress generation capability through discrete quantum dot structures.
2Reliability
If epitaxial stressors are used to improve device performance, then carrier mobility is enhanced, but fabrication complexity and process control difficulty increase
Solution Approach 1:
The patent employs self-assembled SiGe quantum dots that form spontaneously through strain-driven phase separation during selective epitaxial growth. This self-organizing mechanism eliminates the need for complex patterning and positioning steps required for conventional epitaxial stressors, significantly simplifying fabrication.
Solution Approach 2:
The patent changes the growth parameter from continuous epitaxial layer deposition to pulsed or selective growth conditions that enable quantum dot self-assembly. By controlling growth temperature, pressure, and precursor ratios, quantum dots form automatically with controlled density and distribution, reducing process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design enhances device performance by providing the largest stress to the channel region, improving carrier mobility and reducing dislocation defects, thus overcoming the challenges of epitaxial stressor fabrication.
Implementation Method 1
a lattice constant of the second semiconductor material is larger than a lattice constant of the first semiconductor material
Data Source
AI summary
A semiconductor device includes a substrate including a first semiconductor material, a gate structure formed on the substrate, and a source stressor and a drain stressor formed in the substrate respectively in a recess at two sides of the gate structure. The source stressor and the drain stressor respectively include at least a first quantum wire and at least a second quantum wire formed on the first quantum wire. The first quantum wire includes the first semiconductor material and a second semiconductor material, and a lattice constant of the second semiconductor material is larger than a lattice constant of the first semiconductor material. And the second quantum wire includes the second semiconductor material.