Three-Layer Quartz Package Structure for Protected Conductive Components
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Solution Overview
Problem
Existing wafer-level package structures for quartz frequency devices fail to effectively protect conductive components, leading to potential defects and product failures during subsequent processes.
Innovation Solution
A package structure comprising a stacked arrangement of three layers: a first layer, a second layer with an outer frame, resonator, and chip, and a third layer, where the chip is electrically connected to the third layer and the resonator through conductive components, ensuring complete protection within a rectangular accommodation portion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the chip is arranged on the outer surface, then the structure is simpler, but the conductive components are not effectively protected
Solution Approach 1:
The patent implements a nested structure where the chip containing conductive components is positioned between the first and third layers, with the second layer providing additional structural support. This nested arrangement completely encloses the conductive components within the package, providing effective protection while maintaining a compact and integrated design.
2Reliability
If a stacked structure with three layers is used, then complete protection of conductive components is achieved, but the structure becomes more complex
Solution Approach 1:
The patent designs the three-layer stacked structure where each layer serves multiple functions: the first and third layers provide encapsulation and protection while also serving as electrical connection layers; the second layer provides structural support and additional protection. This multi-functionality reduces the need for separate protective components, simplifying the overall design despite the stacked configuration.
Data Source
AI summary
A package structure includes a first layer, a second layer and a third layer. The second layer includes an outer frame, a resonator and a chip. The second layer is arranged between the first layer and the third layer. The outer frame, the first layer and the third layer are constituted a rectangular accommodation portion. The resonator and the chip are located in the rectangular accommodation portion. The chip is located at a side of the resonator, and is electrically connected to the third layer and the resonator through a plurality of conductive components on the chip. A package structure in which the chip is located below the resonator is also provided.