Quasi-Scannable Components in Scan Arrays
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Solution Overview
Problem
Conventional array scan systems face challenges in scan testability, leading to undetected faults due to non-scannable components and increased circuitry size, which complicates fault detection and diagnosis.
Innovation Solution
The introduction of quasi-scannable components that can be selectively configured with other components to form scannable components, arranged in a diagonal pattern within the array, enabling efficient and flexible participation in scan operations, fault detection, and controllability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional array approaches with structured data paths are used, then placement and layout can be simplified, but scan testability is reduced leading to undetected faults
Solution Approach 1:
The invention divides the array into scan chains by segmenting the data paths and inserting scan cells at strategic locations. This segmentation allows scan testing to be performed on portions of the array without requiring complete restructuring of the entire circuit, thereby improving scan testability while limiting the increase in overall device complexity.
Solution Approach 2:
The invention introduces a temporal dimension to scan testing by using clock cycle control. Scan operations are performed during specific clock cycles while normal operations occur during other cycles, allowing the same physical circuit to serve multiple functions without requiring separate dedicated test circuitry for the entire array.
2Reliability
If scan testability is added to improve fault detection, then ability to detect faults increases, but timing and circuitry size increase
Solution Approach 1:
The invention implements periodic scan operations where scan mode is activated during designated clock cycles and normal operation mode during other cycles. This periodic switching allows fault detection capabilities to be integrated without permanently degrading timing performance, as the scan functionality is only active when needed for testing.
Solution Approach 2:
The invention applies scan testing partially to only those portions of the array that benefit most from it, rather than uniformly applying scan structures throughout the entire circuit. This selective application improves fault detection capability for critical areas while minimizing the timing impact across the whole system.
3Reliability
If conventional scan structures are implemented, then fault detection improves, but area and timing are adversely impacted
Solution Approach 1:
The invention designs circuit elements that serve dual purposes: data path elements during normal operation and scan chain elements during test mode. This multi-functionality allows fault detection capabilities to be added without proportionally increasing circuit area, as the same physical structures perform both computational and testing functions.
Solution Approach 2:
The invention merges the data path and scan chain into a unified structure where scan cells are integrated within the existing data path logic. This merging eliminates the need for separate dedicated scan circuitry, thereby improving fault detection capability while minimizing additional area requirements.
Data Source
AI summary
Efficient scan system presented can comprise: an array including a plurality of array non scannable components and a plurality of array quasi-scannable components wherein each column of the array includes at least one of the plurality of array quasi-scannable components; and an input interface configured to receive and selectively forward data and scan information to at least a portion of the array. At least a portion of the plurality of array quasi-scannable components can form a diagonal pattern in the array. The input interface can include: an input interface selection component wherein an output of the input interface selection component is communicatively coupled to an input of the input interface quasi-scannable component associated with one row and an input of the input interface selection component is communicatively coupled to an output of one of the plurality of array quasi-scannable components associated with another row.