Quasi-Superjunction JFET Layout for Higher Breakdown Voltage

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The increasing complexity and power dissipation in semiconductor integrated circuits (ICs) due to scaling down processes necessitate advancements in IC processing and manufacturing to maintain efficiency and reduce costs, particularly in high-voltage applications.

Innovation Solution

The integration of a quasi super junction structure and a conductive plate in a junction field effect transistor (JFET) to enhance breakdown voltage, combined with a synchronous rectifier and transformer circuit design for efficient power conversion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If scaling down process is used to increase functional density, then production efficiency increases and costs decrease, but power dissipation increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidpower dissipation
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The drift region is segmented into multiple alternating n-type and p-type columns forming a quasi-superjunction structure. This segmentation allows for better electric field distribution and reduced power dissipation while maintaining high functional density in scaled-down devices.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the device are given different doping types and concentrations to optimize local electric field management. The alternating n-type and p-type columns create localized charge regions that reduce overall power dissipation in the scaled-down structure.

Inventive Principle:
Principle #3Local quality

2Productivity

If geometry size is decreased to increase functional density, then more devices fit per chip area, but breakdown voltage decreases due to high electrical fields

Engineering Contradiction:
Improvefunctional densityVSAvoidbreakdown voltage
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The drift region is divided into alternating n-type and p-type columns, creating a quasi-superjunction structure that segments the electric field paths. This segmentation maintains high breakdown voltage even when overall device geometry is scaled down to increase functional density.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The alternating doped columns act as intermediary charge regions that mediate the electric field distribution. These intermediary regions prevent direct high-field paths, maintaining breakdown voltage in scaled-down geometries.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If quasi super junction structure is implemented to increase breakdown voltage, then device reliability improves, but manufacturing complexity increases

Engineering Contradiction:
Improvebreakdown voltageVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

While segmentation into alternating columns increases structural complexity, it is implemented through standard semiconductor fabrication techniques (ion implantation or in-situ doping), making the complexity manageable in terms of manufacturing processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The quasi-superjunction structure is achieved by changing doping parameters (type, concentration, depth) in alternating columns. These parameter changes are implemented through controlled fabrication processes, balancing structural complexity with manufacturing feasibility.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250248087A1Integrated circuit and method for forming the same
Publication Date: 2025.07.31 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250248087A1 patent drawing
  • US20250248087A1 patent drawing
  • US20250248087A1 patent drawing

AI summary

An integrated circuit includes a substrate. The substrate includes a p-type substrate region, a first n-type region over the p-type substrate region, a second n-type region over the p-type substrate region, a first p-type epitaxial region over the p-type substrate region and between the first and second n-type regions, wherein in a top view the first p-type epitaxial region has a ring-shape top profile, and a p-type doped region within the second n-type region. An isolation structure is over the p-type substrate region, wherein in a cross-sectional view the first p-type epitaxial region extends from a top surface of the p-type substrate region to a bottom surface of the isolation structure. A drain electrode is electrically coupled to the first n-type region. A gate electrode electrically coupled to the p-type doped region. A source electrode is electrically coupled to the second n-type region.