Qubit Allocation on NISQ Hardware With Minimal SWAP Overhead

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Solution Overview

Problem

The Qubit Allocation Problem in quantum computing is NP-complete, making it challenging to find optimal solutions for mapping logical qubits to physical qubits on noisy intermediate-scale quantum (NISQ) devices while minimizing noise and computational cost, especially due to limited hardware connectivity and varying qubit fidelities.

Innovation Solution

A directed local search algorithm combined with randomized optimization, such as simulated annealing, is used to find a weighted shortest path in a directed acyclic allocation graph, allowing for efficient qubit allocation that balances time and solution quality, and incorporates lazy swap insertion to minimize the number of necessary SWAP gates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If exhaustive search methods are used to solve the Qubit Allocation Problem, then optimal allocation solutions can be found, but the computational time and complexity become prohibitively expensive

Engineering Contradiction:
Improveallocation optimalityVSAvoidcomputational time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent segments the exhaustive search space into a directed acyclic graph where nodes represent partial allocations and edges represent allocation transitions. This segmentation allows the search to be structured and pruned efficiently, avoiding the need to explore all possible allocations while still finding optimal solutions.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary actions by pre-computing fidelity values for all possible qubit allocations and storing them in the graph structure before the actual search. This preliminary computation allows the search algorithm to make informed decisions without recalculating fidelities during the search, significantly reducing computational time.

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If more SWAP gates are inserted to satisfy hardware connectivity constraints, then qubit allocation feasibility is improved, but noise and computational error increase

Engineering Contradiction:
Improveconnectivity compatibilityVSAvoidnoise
Core Design Contradiction:
Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent treats SWAP gates as expensive operations that should be minimized. By assigning high costs to SWAP gate insertions in the allocation graph, the algorithm preferentially selects allocation paths that require fewer or no SWAP gates, thereby reducing noise while still satisfying connectivity constraints.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Solution Approach 2:

The patent introduces an intermediary cost function that balances connectivity satisfaction against SWAP gate insertion. This cost function acts as a mediator between the competing requirements of hardware compatibility and noise reduction, allowing the algorithm to find allocations that satisfy connectivity with minimal SWAP gates.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If qubit allocation does not consider varying qubit fidelities, then allocation speed is improved, but computation fidelity decreases

Engineering Contradiction:
Improveallocation speedVSAvoidcomputation fidelity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by assigning different fidelity values to different physical qubits based on their individual characteristics. The allocation algorithm then uses these local fidelity differences to preferentially allocate logical qubits to physical qubits with higher fidelities, improving overall computation fidelity while maintaining efficient allocation through pre-computed fidelity data.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS11455564B2Qubit allocation for noisy intermediate-scale quantum computers
Publication Date: 2022.09.27 PRESIDENT & FELLOWS OF HARVARD COLLEGE
  • US11455564B2 patent drawing
  • US11455564B2 patent drawing
  • US11455564B2 patent drawing

AI summary

Qubit allocation for noisy intermediate-scale quantum computers is provided. A quantum circuit comprises a plurality of logical qubits. A hardware specification comprising a connectivity graph of a plurality of physical qubits. A directed acyclic allocation graph is determined based on the plurality of logical qubits and the connectivity graph. The allocation graph comprises a node for each possible allocation of the plurality of logical qubits to the plurality of physical qubits, each allocation having a fidelity, and a plurality of directed edges, each edge connecting to its corresponding first node from its corresponding second node, the first node corresponding to a first allocation, the second node corresponding to a sub-allocation of the first allocation. The allocation graph is searched for a weighted shortest path from a root node of the allocation graph to a leaf node of the allocation graph. The allocation corresponding to the weighted shortest path is outputted.