Qubit Reordering for Faster Decision Diagram Quantum Simulation
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Solution Overview
Problem
Conventional DD quantum circuit simulators face inefficiencies due to the lack of qubit rearrangement, leading to prolonged simulation times, especially for quantum circuits with quantum gates having parameters.
Innovation Solution
An information processing apparatus that counts and rearranges the order of qubits based on the simulation times of different types of quantum gates, prioritizing qubits with more time-consuming gates to be placed posteriorly in the simulation order, thereby optimizing the qubit order for faster simulation using decision diagrams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If qubit rearrangement is not performed in DD quantum circuit simulators, then the implementation is simple, but the simulation time is prolonged
Solution Approach 1:
The patent applies preliminary action by performing qubit rearrangement before the actual quantum circuit simulation. The counting unit analyzes the quantum circuit in advance to count quantum gates for each qubit, and the rearrangement unit determines the optimal qubit order beforehand. This preliminary analysis and rearrangement prevents prolonged simulation time during the actual execution, resolving the contradiction between simple implementation and fast simulation.
2Loss of time
If qubits are rearranged based on quantum gate counts, then simulation time decreases, but the processing complexity increases
Solution Approach 1:
The patent applies segmentation by dividing the qubit rearrangement process into distinct functional units: a counting unit that counts quantum gates for each qubit, a determination unit that decides the rearrangement order based on counts, and a rearrangement unit that performs the actual reordering. This segmentation reduces processing complexity by making each unit's task simple and well-defined, while still achieving the goal of reduced simulation time through optimized qubit ordering.
Data Source
AI summary
An information processing apparatus includes a counting unit, a rearrangement unit and an output unit. The counting unit counts, on the basis of a relation between types of quantum gates of plural types used in a quantum circuit and simulation times in a quantum circuit simulator that uses a decision diagram, the numbers of the quantum gates in descending order of the simulation time for each qubit of the quantum circuit targeted. The rearrangement unit determines the quantum gates with lengths of the simulation times at a predetermined rank or higher from the plural types of quantum gates, determines the number of quantum gates for each of the quantum gates determined in a case where there are plural types of the quantum gates determined to be at the predetermined rank or higher, and rearranges an order of the qubits to be provided to the quantum circuit simulator in ascending order of the number determined. The output unit that outputs the rearranged order of the qubits.