Qubit Routing via Weighted Graph Optimization

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Solution Overview

Problem

Existing NISQ devices face challenges in efficiently routing qubits due to their sparse connection structure, leading to increased noise and error rates from swap gate operations.

Innovation Solution

A method involving the modeling of a quantum circuit as a weighted graph, where nodes represent qubits and edges represent direct connections, weighted based on the order of operations. This graph is then used to solve a Quadratic Assignment Problem (QAP) to determine an initial qubit mapping that minimizes the distance between qubits involved in operations, thereby reducing the need for swap gates.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If qubits are routed in NISQ devices with sparse connection structure, then quantum computations can be performed, but the number of swap gate operations increases leading to higher noise and error rates

Engineering Contradiction:
Improveerror rateVSAvoidswap gate operations
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing qubit routing and mapping optimization before the actual quantum computation begins. The system pre-calculates the optimal mapping between logical qubits and physical qubits, and determines the routing paths in advance, thereby minimizing the number of swap gates needed during computation. This upfront planning reduces the operational complexity and error rates during the actual quantum circuit execution.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a graph-based dimensional framework where qubits are represented as nodes and connections as edges. By modeling the quantum device architecture as a graph structure and the routing problem as a graph optimization problem (specifically a Quadratic Assignment Problem), the system transforms the physical routing challenge into a mathematical optimization domain, enabling more efficient solution approaches.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the number of qubits is limited in NISQ devices, then device complexity is reduced, but the ability to perform computationally demanding tasks is compromised

Engineering Contradiction:
Improvecomputational capabilityVSAvoidnumber of qubits
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent applies parameter changes by optimizing the mapping between logical and physical qubits to maximize the utilization of available qubits. By changing the assignment parameters (which logical qubit maps to which physical qubit) and routing parameters (paths between qubits), the system extracts maximum computational capability from the limited qubit count, effectively increasing productivity without requiring more physical qubits.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If swap gate operations are increased to route qubits in sparse connection structures, then connectivity is improved, but noise and error rates increase

Engineering Contradiction:
Improvequbit connectivityVSAvoidnoise level
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The system performs preliminary routing optimization to determine the most efficient paths between qubits before execution. By pre-calculating routing paths that minimize swaps and pre-establishing the optimal logical-to-physical qubit mapping, the system achieves necessary connectivity while minimizing exposure to noise and errors during the actual computation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces an intermediary optimization layer (the graph-based routing algorithm and mapping optimizer) that mediates between the logical quantum circuit requirements and the physical device constraints. This intermediary system finds optimal pathways and mappings that satisfy connectivity needs while minimizing harmful swap operations, acting as a buffer between the computational requirements and the noisy physical hardware.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20250036986A1Quantum bit routing
Publication Date: 2025.01.30 FUJITSU LTD
  • US20250036986A1 patent drawing
  • US20250036986A1 patent drawing
  • US20250036986A1 patent drawing

AI summary

A method may include obtaining a graph in which a first and a second node respectively represent a first and a second qubit. The method may include generating candidate paths between the first and second nodes along one or more edges, each candidate path specifying a path that arrives at a target edge between the first and second nodes. The method may include computing scores for a plurality of path pairs, a respective score indicating how efficiently a respective path pair routes the first node to the second node via the target edge. The score may be weighted based on an order in which operations of the quantum circuit are performed with earlier operations being weighted more heavily than later operations. The method may include selecting the path pair that corresponds to a highest score for routing the first node to the second node via the target edge.