Queue-ID Block Caching for Sequential Flash Destaging

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Solution Overview

Problem

Conventional memory systems experience increased write amplification and data fragmentation due to the loss of sequentiality in data access requests caused by multicore hardware processors, leading to inefficient data management and performance degradation.

Innovation Solution

Implement block caching on a memory system with queue identifiers, where data is written to cache blocks with associated queue identifiers, and subsequently moved to non-cache blocks based on these identifiers to maintain sequentiality and reduce fragmentation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data is written to cache blocks without queue identifier management, then write speed is improved, but data sequentiality is lost and write amplification increases

Engineering Contradiction:
Improvewrite speedVSAvoidwrite amplification
Core Design Contradiction:
SpeedVSLoss of energy

Solution Approach 1:

The patent applies preliminary action by storing queue identifiers (QIDs) in metadata during the initial write operation to cache blocks. This pre-tagging enables subsequent identification and grouping of sequential data from the same queue, allowing the system to maintain data sequentiality during destaging operations without requiring additional write operations, thus resolving the contradiction between fast writing and energy-efficient storage.

Inventive Principle:
Principle #10Preliminary action

2Speed

If data is written to cache blocks without queue identifier management, then write speed is improved, but data fragmentation increases

Engineering Contradiction:
Improvewrite speedVSAvoiddata fragmentation
Core Design Contradiction:
SpeedVSStability of the object's composition

Solution Approach 1:

The patent uses preliminary action by embedding queue identifiers in metadata at the time of writing to cache blocks. This pre-tagging enables the system to later group and destage sequential data from the same queue together, preventing data fragmentation while maintaining high write speeds during the initial cache write operation.

Inventive Principle:
Principle #10Preliminary action

3Stability of the object's composition

If queue identifiers are stored in metadata for each cache block, then data sequentiality is maintained, but device complexity increases

Engineering Contradiction:
Improvedata sequentialityVSAvoidmetadata management complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent applies copying by storing queue identifiers in metadata as lightweight copies of the queue identification information. Rather than complex tracking structures, the system creates simple metadata entries that are copied with each cache block, enabling sequentiality maintenance through straightforward metadata comparisons during destaging operations.

Inventive Principle:
Principle #26Copying

4Stability of the object's composition

If queue identifiers are used to manage cache blocks, then data organization is improved, but processing time increases

Engineering Contradiction:
Improvedata organizationVSAvoidprocessing time
Core Design Contradiction:
Stability of the object's compositionVSLoss of time

Solution Approach 1:

The patent uses copying of queue identifiers to metadata to enable efficient data organization. The metadata contains copied QID information that can be quickly compared and matched during destaging operations, allowing the system to organize sequential data without requiring complex processing or additional I/O operations that would increase processing time.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12547346B2Block caching with queue identifiers
Publication Date: 2026.02.10 MICRON TECHNOLOGY INC
  • US12547346B2 patent drawing
  • US12547346B2 patent drawing
  • US12547346B2 patent drawing

AI summary

Various embodiments provide for block caching with queue identifiers on a memory system. In particular, when a write request to write host data is executed on a memory system that uses write/block caching and the host data is written to one or more cache blocks of a memory device of the memory system, the memory system can cause the queue identifier of the write request to be stored on the memory system in association with the host data. Subsequently, when the memory system moves (e.g., de-stages) data from one or more cache blocks (e.g., single-level cell (SLC) blocks) to one or more non-cache blocks (e.g., quad-level cell (QLC) blocks), the memory system can do so based on queue identifiers associated with host data written on one or more cache blocks of the memory system.