Queue Management Using Macrocells to Reduce Chip Storage
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Solution Overview
Problem
Current queue management solutions in network chips require significant storage resources for maintaining pointers to next packets, leading to increased chip costs and power consumption, especially in high-bandwidth devices that need to buffer large numbers of packets.
Innovation Solution
The method involves packaging consecutive buffer cells into macrocells, where only the average packet length is maintained, eliminating the need for storing pointers to next packets, and using macrocells as the granularity for queue management, reducing storage resources and power consumption in network chips.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If packet data is buffered in random memory outside the chip and queue information is placed inside the chip, then scheduling accuracy and QoS are ensured, but storage resources in the chip are significantly occupied, causing increased chip costs and power consumption
Solution Approach 1:
The patent segments the queue management data structure into two parts: packet descriptors (PD) are stored in external random memory, while only essential queue management information (head pointer, tail pointer, and average packet length) is maintained in the chip's entity queue. This segmentation reduces the storage burden on the chip while preserving scheduling functionality.
Solution Approach 2:
The patent extracts the packet length information from individual packet descriptors and replaces it with an average packet length field at the entity queue level. This extraction eliminates the need to store individual packet lengths in the chip, significantly reducing storage resources while maintaining scheduling accuracy through the use of average length for scheduling decisions.
2Ease of operation
If pointers to next packet are maintained for each packet in the entity queue, then normal chip functions are implemented, but chip costs and power consumption increase significantly
Solution Approach 1:
The patent merges multiple packet descriptors that point to the same entity queue into a shared structure. Instead of maintaining individual next packet pointers for each packet, the entity queue maintains a single head pointer and tail pointer that manage all packets in the queue, reducing the number of pointers stored in the chip and thereby reducing power consumption.
Solution Approach 2:
The patent changes the parameter representation from individual packet lengths to an average packet length parameter at the entity queue level. This parameter change allows the system to maintain scheduling functionality with fewer stored values, reducing both storage resources and the power required to maintain them.
Data Source
AI summary
A queue management method and apparatus are disclosed. The queue management method includes: storing a first packet to a first buffer cell included in a first macrocell, where the first macrocell is enqueued to a first entity queue, the first macrocell includes N consecutive buffer cells, and the first buffer cell belongs to the N buffer cells; correcting, based on a packet length of the first packet, an average packet length in the first macrocell that is obtained before the first packet is stored, to obtain a current average packet length in the first macrocell; and generating, based on the first macrocell and the first entity queue, queue information corresponding to the first macrocell of the first macrocell in the first entity queue, a head pointer in the first macrocell, a tail pointer in the first macrocell, and the current average packet length in the first macrocell.