Transmission Apparatus for QUIC Packet Segmentation and Encryption
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Solution Overview
Problem
Current communication devices that support the QUIC protocol overburden the central processing unit by dividing and encrypting data packets, leading to increased CPU utilization and reduced system memory availability for other data storage.
Innovation Solution
A transmission apparatus with a transmission engine and data memory that preprocesses data packets to generate segment data packets, utilizing a header buffer, segment controller, and encrypt engine to store and encrypt headers and payloads separately, reducing CPU workload and optimizing system memory usage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the central processing unit divides and encrypts data packets, then the data transmission can be completed, but the CPU utilization rate increases
Solution Approach 1:
The patent divides the data packet processing into separate functional modules: a header buffer for storing packet headers, a segment controller for dividing payloads into segments, and an encrypt engine for encryption. This segmentation allows parallel processing and distributes the workload away from the CPU, reducing CPU utilization while maintaining transmission productivity.
Solution Approach 2:
The patent introduces a transmission apparatus as an intermediary component between the CPU and the data transmission process. This apparatus includes dedicated hardware components (header buffer, segment controller, encrypt engine) that handle packet processing tasks, freeing the CPU from intensive processing while ensuring data transmission completion.
2Ease of manufacture
If the system memory stores the header of the data packet, then the data packet can be processed, but the system memory cannot store other data
Solution Approach 1:
The patent extracts the header storage function from the system memory by introducing a dedicated header buffer component. This separation allows the system memory to be used for other data storage purposes while the header buffer specifically handles header storage for packet processing, increasing overall memory utilization efficiency.
3Use of energy by moving object
If the transmission apparatus uses a header buffer to store headers and separates encryption, then the CPU workload is reduced, but the device complexity increases
Solution Approach 1:
The transmission apparatus is designed as a multi-functional integrated component that handles header buffering, packet segmentation, and encryption operations. By consolidating these functions into a single apparatus, the patent reduces CPU workload while managing device complexity through functional integration rather than separate independent components.
Data Source
AI summary
A transmission apparatus for preprocessing a data packet stored in a system memory to generate at least one segment data packet is provided. The transmission apparatus includes a transmission engine and a data memory. The transmission engine includes a header buffer, a segment controller and an encrypt engine. The header buffer stores an IP header, a UDP header, a QUIC public header and a QUIC private header of the data packet. The segment controller divides a payload of the data packet into at least one segment payload. The encrypt engine encrypts the QUIC private header and the at least one segment payload into at least one encrypted data. The data memory receives the IP header, UDP header, QUIC public header and at least one encrypted data. The IP header, UDP header, QUIC public header and at least one encrypted data are combined into at least one segment data packet.