R-2R DAC Load Compensation for Differential Non-Linearity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
R-2R digital-to-analog conversion circuits suffer from differential non-linearity due to resistor mismatch, layout parasitics, transistor on-resistance, and op-amp gain variation, leading to inaccuracies and non-linear behavior, especially at high bit transitions, limiting their accuracy and usefulness for high-bit conversions.
Innovation Solution
A variable resistance is added in parallel with the R-2R circuit to maintain a constant total current sourcing from the op-amp output, compensating for changes in the R-2R element current, thereby keeping the op-amp gain uniform and reducing errors caused by open loop gain variation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If an R-2R ladder circuit is used for digital-to-analog conversion, then the circuit is inexpensive and relatively easy to manufacture, but the circuit suffers from differential non-linearity and inaccuracies due to resistor mismatch
Solution Approach 1:
A current mirror circuit is introduced as an intermediary between the R-2R ladder and the output stage. The current mirror copies the current from the R-2R ladder while providing current buffering, which isolates the ladder from load effects and reduces the impact of resistor mismatches on the overall transfer characteristic.
Solution Approach 2:
The circuit topology is changed from a direct R-2R voltage output to a current-output R-2R ladder followed by a current mirror. This parameter change in the output mode transforms the voltage-dependent non-linearity into a current-mode operation that is less sensitive to resistor variations.
2Adaptability or versatility
If higher bit transitions occur in an R-2R circuit, then the conversion covers a wider range, but non-linear kinks appear in the step size at major crossings
Solution Approach 1:
The current mirror acts as a mediator that linearizes the transfer function at high-bit transitions. By buffering the current and providing a high-impedance output, it prevents the loading effects that cause non-linear kinks during major bit crossings such as from 01111 to 10000.
Solution Approach 2:
The current mirror provides implicit feedback by maintaining a stable current relationship between the input and output sides. This feedback mechanism compensates for variations in the R-2R ladder currents during high-bit transitions, reducing the non-linear kinks in the step size.
3Manufacturing precision
If resistor values are tightly matched to reduce non-linearity, then differential non-linearity improves, but the complexity and cost of manufacturing increases
Solution Approach 1:
The circuit replaces the mechanical/physical requirement for precise resistor matching with an electrical solution using current mirrors. Instead of relying on tightly matched resistors, the current mirror topology electrically compensates for resistor variations, reducing the need for extreme manufacturing precision.
Solution Approach 2:
The design changes from a voltage-output architecture that is sensitive to resistor ratios to a current-output architecture that is less sensitive to resistor variations. This parameter change in the output mode reduces the impact of resistor mismatch on differential non-linearity.
Data Source
AI summary
A circuit and corresponding method are presented for generating an analog voltage from a digital input value is presented. An digital to analog conversion circuit, which is connected between a node and ground, receives an N-bit digital input value and generate from it a corresponding analog voltage. The node receives an input voltage provided by an op-amp connected to receive a reference voltage. The circuit also includes a variable resistance connected between the first node and ground in parallel with the digital to analog conversion circuit. The variable resistance is also connected to receive one or more of the digital input value and the value of the variable resistance is dependent upon the digital input values such that the combined current drawn from the first node by the variable resistance and the digital to analog conversion circuit is essentially constant during operation.