R-2R D/A Converter Switching to Limit On-Resistance DNL Error
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Solution Overview
Problem
Conventional R-2R type D/A converters experience deterioration in DNL characteristics and D/A conversion accuracy due to variations in on-resistance values of transistors, especially as the number of bits increases, leading to increased variation ranges in terminal voltages and reduced accuracy.
Innovation Solution
The implementation of a digital-to-analog converter with resistors having a binary weighting ratio for on-resistances, where the transistors on the LSB side are kept in an open state whenever possible to minimize the impact of large on-resistances and reduce variations, while transistors on the MSB side with smaller on-resistances are used to maintain accurate voltage output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If transistor sizes are weighted in binary ratio to suppress DNL deterioration, then DNL characteristics improve, but device complexity increases due to varying transistor sizes
Solution Approach 1:
The patent applies local quality by making transistors on the LSB side have different characteristics (open state or different size) compared to transistors on the MSB side. Specifically, transistors corresponding to lower significant bits are configured to be in an open state or have different sizing to compensate for their larger on-resistance impact, while MSB transistors maintain standard operation. This localized differentiation improves overall DNL characteristics without requiring all transistors to be redesigned.
Solution Approach 2:
The patent changes the operational parameter (state) of transistors based on their position in the resistor network. Transistors on the LSB side are switched to an open state or have their size parameters adjusted, while MSB transistors remain in standard conductive state. This parameter change allows the system to compensate for the exponentially increasing impact of on-resistance variations at lower bit positions.
2Measurement precision
If number of bits is increased to improve resolution, then D/A conversion accuracy should improve, but variation ranges of on-resistances increase causing accuracy deterioration
Solution Approach 1:
The patent applies preliminary anti-action by proactively placing transistors on the LSB side in an open state or with modified characteristics before they can introduce significant errors. This preemptive measure counteracts the inevitable increase in on-resistance variation impact that occurs with higher bit configurations, allowing the system to maintain accuracy despite increased resolution requirements.
Solution Approach 2:
The patent differentiates transistor characteristics based on their positional quality requirements. LSB transistors, which have greater impact on accuracy due to their position in the binary-weighted network, are given special treatment (open state or modified sizing) while MSB transistors use standard design. This local quality approach allows high-bit configurations without sacrificing accuracy.
3Measurement precision
If transistor on-resistances are made smaller to reduce variation impact, then D/A conversion accuracy improves, but transistor size increases leading to larger device area
Solution Approach 1:
The patent applies partial action by modifying only the transistors that are most critical to accuracy (LSB side transistors) while leaving MSB transistors in standard configuration. Instead of reducing the size of all transistors throughout the network, the invention selectively opens or modifies only those transistors whose on-resistance variations have the greatest impact on DNL and accuracy, thus avoiding unnecessary area increase.
Data Source
AI summary
A digital-to-analog (D/A) converter includes first resistors coupled in series, second resistors respectively coupled to the first resistors and each having a resistance twice as large as the resistance of the first resistor, and first switch circuits respectively coupled to the second resistors. Third resistors each have a resistance twice as large as the resistance of the first resistor. Second switch circuits each are coupled to the third resistors and a GND wire. A control circuit controls the first and second switch circuit in accordance with the digital input signals to set a state of a connection node to either one of a first voltage, a second voltage, and a high impedance.