Master-Slave Radar Chip Oscillator Synchronization via Delay Compensation
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Solution Overview
Problem
Radar systems face errors in position and velocity estimation due to routing delays and phase differences in the local oscillator signal across transmit and receive units, leading to high power consumption, heat dissipation, and large area requirements.
Innovation Solution
A radar apparatus architecture with a master and slave radar chip configuration, where the local oscillator and transceiver units are split across two chips, using a delay detect circuit to estimate and compensate for routing delays, reducing power consumption and area requirements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the local oscillator and transceiver units are integrated on a single chip, then the radar system achieves high integration, but power consumption increases, heat dissipation increases, and chip area increases
Solution Approach 1:
The radar system is divided into multiple chips: a first chip containing the local oscillator and a second chip containing transceiver units. This segmentation reduces the functionality and complexity of each individual chip, thereby reducing power consumption and heat dissipation per chip while maintaining overall system integration through multiple chips working together.
2Ease of operation
If the local oscillator signal is routed to multiple transceiver units on the same chip, then signal distribution is achieved, but routing delays and phase differences cause position and velocity estimation errors
Solution Approach 1:
By placing the local oscillator on a separate first chip from the transceiver units on the second chip, the patent eliminates complex on-chip signal routing. The signal distribution is achieved through controlled inter-chip connections, which reduce routing delays and phase differences, thereby improving position and velocity estimation accuracy.
Solution Approach 2:
The patent introduces an intermediary mechanism (separate chip architecture with controlled signal paths) between the local oscillator and transceiver units. This intermediary approach allows for better control of signal routing delays and phase differences compared to direct on-chip routing, improving measurement precision.
3Ease of operation
If the local oscillator signal is routed to multiple transceiver units, then signal distribution is achieved, but the chip area required increases
Solution Approach 1:
The radar system is divided into multiple chips: a first chip containing the local oscillator and a second chip containing transceiver units. This segmentation reduces the functionality and complexity of each individual chip, thereby reducing the chip area required for each chip while maintaining overall system functionality through multiple chips working together.
Data Source
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Figure 2(b)~4
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AI summary
In described examples of a radar apparatus (100) for estimating a position and a velocity of obstacles, the radar apparatus (100) includes a slave radar chip (152). A master radar chip (102) is coupled to the slave radar chip (152). The master radar chip (102) includes a local oscillator (104) that generates a transmit signal. The slave radar chip (152) receives the transmit signal on a first path (114) and sends the transmit signal back to the master radar chip (102) on a second path (116). A delay detect circuit (108) is coupled to the local oscillator (104) and receives the transmit signal from the slave radar chip (152) on the second path (116) and the transmit signal from the local oscillator (104). The delay detect circuit (108) estimates a routing delay from the transmit signal received from the slave radar chip (152) on the second path (116) and from the transmit signal received from the local oscillator (104).