Radar Data Acquisition Apparatus Dynamic Transaction Selection

Solution Overview

Problem

Conventional radar data acquisition systems using MIPI CSI2 interface do not deliver optimal performance due to limitations in processing high-speed serial traffic with mixed coherent and non-coherent transactions across multiple virtual channels and data types, leading to inefficiencies in system throughput and performance.

Innovation Solution

A radar data acquisition apparatus with logic circuitry that includes a memory circuit and bus-interface circuit to control bus interconnects, allowing for selectable coherent or non-coherent transactions based on data type and virtual channel, optimizing interconnect fabric use and processing efficiency by the master processor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If only coherent transactions are used for all virtual channels and data types, then cache processing by the master processor is enabled, but system throughput and performance are suboptimal

Engineering Contradiction:

Improvecache processing capabilityVSAvoidsystem throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system dynamically selects between coherent and non-coherent transactions based on the data type and virtual channel being processed. The transaction type is not fixed but adapts according to the specific data flow requirements, allowing optimal performance for each channel while maintaining cache coherence where needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Different transaction types (coherent or non-coherent) are applied to different virtual channels and data types locally. ADC data may use one transaction type while user/embedded data uses another, allowing each data stream to be optimized independently rather than applying a uniform approach system-wide.

Inventive Principle:

Principle #3Local quality

2Device complexity

If only non-coherent transactions are used for all virtual channels and data types, then switching fabric burden is reduced, but cache processing and data consistency are compromised

Engineering Contradiction:

Improveswitching fabric burdenVSAvoidcache processing capability

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The system dynamically selects between coherent and non-coherent transactions based on the data type and virtual channel being processed. The transaction type is not fixed but adapts according to the specific data flow requirements, allowing optimal performance for each channel while maintaining cache coherence where needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Different transaction types (coherent or non-coherent) are applied to different virtual channels and data types locally. ADC data may use one transaction type while user/embedded data uses another, allowing each data stream to be optimized independently rather than applying a uniform approach system-wide.

Inventive Principle:

Principle #3Local quality

3Device complexity

If a single transaction type is used for all data types and virtual channels, then system complexity is reduced, but processing efficiency and throughput are suboptimal

Engineering Contradiction:

Improvetransaction processing complexityVSAvoidprocessing efficiency

Core Design Contradiction:

Device complexityVSProductivity

Solution Approach 1:

The system dynamically selects between coherent and non-coherent transactions based on the data type and virtual channel being processed. The transaction type is not fixed but adapts according to the specific data flow requirements, allowing optimal performance for each channel while maintaining cache coherence where needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

Different transaction types (coherent or non-coherent) are applied to different virtual channels and data types locally. ADC data may use one transaction type while user/embedded data uses another, allowing each data stream to be optimized independently rather than applying a uniform approach system-wide.

Inventive Principle:

Principle #3Local quality

Data Source

PatentEP4020241B1Methods and apparatuses involving radar system data paths

Publication Date: 2024.04.10 NXP USA INC

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AI summary

Exemplary aspects for a specific example concern a radar system having sensor circuitry including multiple radar sensors to provide sensor data via multiple virtual channels and multiple data types (210), a memory circuit (240) with memory buffers, and a bus-interface circuit (260) to control bus interconnects for bus communications involving a radar signal transmitter and the memory circuit (240). Radar signals are received and processed, via data acquisition path circuitry in multiple circuit paths and via streams of data in response to and to accommodate the operations of the sensor circuitry. A master controller conveys data, via the bus-interface circuit, to the buffers for the sensor data, and generates selectable-type transactions to be linked in selected ones of the buffers, in response to the data provided from the sensor circuitry and based on the sensor data being provided via different ones of the multiple virtual channels and of the multiple data types.