Radar Signal Processing DMA Engine Buffer Resorting

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Solution Overview

Problem

Current radar signal processing methods are inefficient in handling multiple data entries and require extensive memory access, leading to suboptimal performance and increased power consumption in radar systems.

Innovation Solution

A DMA engine and buffer system that conducts read access to memory, filling the buffer by resorting at least two data entries, and processing the content using a processing stage, allowing for efficient processing of radar signals through transposed data handling and optimized memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional radar signal processing methods are used, then data processing can be performed, but processing efficiency is low and power consumption is high

Engineering Contradiction:
Improvesignal processing efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by performing data resorting in advance within the buffer memory before processing. The DMA engine sorts multiple data entries (e.g., from different antennas or radar channels) into a predetermined processing order during the data loading phase, so that when the processing stage executes, the data is already optimally arranged. This eliminates the need for time-consuming data reorganization during actual processing, thereby improving processing efficiency and reducing power consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a buffer memory as an intermediary between the DMA engine and the processing stage. This buffer serves as a mediator that temporarily stores and pre-processes radar data, allowing the DMA engine to perform resorting operations without affecting the real-time processing requirements of the processing stage. The buffer acts as a decoupling element that improves overall system efficiency by separating data preparation from data processing.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If extensive memory access operations are performed, then all data can be processed, but processing time increases and performance decreases

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory access time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary data resorting in the buffer memory before the processing stage accesses the data. By organizing multiple data entries into the correct processing sequence during the data loading phase (while data is being transferred from external memory), the system eliminates the need for additional memory access operations during processing. This preliminary organization significantly reduces processing time and improves processing speed.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent combines multiple data access operations into a single efficient process. The DMA engine performs both data transfer from external memory and data resorting in the buffer in one coordinated operation, rather than requiring separate memory access cycles for each data element. This merging of operations reduces the total number of memory access cycles and improves overall processing throughput.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS10852409B2Method and device for processing radar signals
Publication Date: 2020.12.01 INFINEON TECHNOLOGIES AG
  • US10852409B2 patent drawing
  • US10852409B2 patent drawing
  • US10852409B2 patent drawing

AI summary

A device for processing radar signals is suggested, said device comprising a DMA engine, a buffer and a processing stage, wherein the DMA engine is arranged for conducting a read access to a memory, wherein such read access comprises at least two data entries, and for filling the buffer by resorting the at least two data entries, wherein the processing stage is arranged for processing the data stored in the buffer.