Radar Signal Delay Circuit for Multi-Target Return Simulation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing radar simulators face challenges in accurately replicating diverse radar return signals, managing signal delays and synchronizing multiple input signals, especially when integrated with large antenna arrays, and ensuring reliable performance across varying environmental conditions.

Innovation Solution

A signal delay circuit comprising a receiver, limiting amplifier, fixed delay line, and optional attenuator or amplifier, which introduces controlled time delay and amplitude limitation, using modular components like coaxial or fiber delay lines, and opto-electronic converters to simulate radar targets with precision.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a radar simulator uses traditional signal delay circuits to replicate radar return signals, then it can simulate targets at specific distances, but it struggles to accurately replicate diverse radar return signals with varying amplitudes and phases across multiple targets

Engineering Contradiction:
Improveaccuracy of radar return signal replicationVSAvoidcomplexity of signal delay circuit
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The signal delay circuit is divided into multiple independent delay elements (first delay element, second delay element, etc.), each responsible for a specific target's signal delay. This segmentation allows each element to be optimized for specific delay requirements while maintaining overall system capability to handle multiple targets with diverse radar return characteristics.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The delay circuit is designed with multiple delay elements that can collectively handle various radar return signal scenarios including different distances, amplitudes, and phases. The circuit can simulate both stationary and moving targets, and can operate with different antenna array configurations, making it universally applicable to diverse radar testing requirements.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If the radar simulator integrates with large antenna arrays to enhance detection capability, then it can perform multi-wave scanning and real-time data processing, but signal synchronization and integration become more difficult

Engineering Contradiction:
Improvereal-time data processing capabilityVSAvoiddifficulty of signal synchronization
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The delay circuit performs preliminary signal delay adjustment before signals reach the antenna array, pre-synchronizing the timing of signals from different antenna elements. This preliminary action compensates for the timing differences inherent in large antenna arrays, enabling seamless signal integration and synchronization during real-time processing.

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If the radar simulator uses fixed delay lines to introduce predetermined time delay, then it can simulate specific target distances, but it lacks flexibility to adapt to diverse input receiver types and future-proofing requirements

Engineering Contradiction:
Improveprecision of time delayVSAvoidcompatibility with diverse input receiver types
Core Design Contradiction:
Measurement precisionVSAdaptability or versatility

Solution Approach 1:

The delay circuit incorporates variable delay elements that can dynamically adjust delay times based on different testing scenarios and receiver types. This dynamic capability allows the same circuit to adapt to various input receiver configurations and future-proof the system against emerging radar technologies without requiring hardware redesign.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250216509A1Signal delay circuit and radar simulator comprising such delay circuit
Publication Date: 2025.07.03 ROHDE & SCHWARZ GMBH & CO KG
  • US20250216509A1 patent drawing
  • US20250216509A1 patent drawing
  • US20250216509A1 patent drawing

AI summary

A delay circuit comprises a receiver for an incoming signal, a limiting amplifier, configured to receive and process the incoming signal, a fixed delay line configured to introduce a predetermined time delay to the signals down-or-up-stream the power controlling circuit.A radar target simulator system using such delay circuit may provide a simulated radar target response by introducing a controlled time delay and amplitude limitation to said incoming signal.