Integrated Radar Transceiver Phase Calibration via Frequency Domain Analysis
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Solution Overview
Problem
Current solutions for phase and group delay measurement/monitoring in integrated radar transceiver circuits are inadequate, especially with increasing Intermediate Frequency (IF) bandwidths, leading to challenges in inter-chip phase synchronization.
Innovation Solution
An integrated radar transceiver circuit that includes a local oscillator (LO) circuit, a test signal generator circuit, an up-conversion circuit, a down-conversion circuit, a phase detector circuit, and a processor. This circuit generates test signals with different frequency components, mixes them with the LO signal, and determines phases to calculate group delay information.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If current phase calibration methods are used, then inter-chip phase synchronization can be achieved, but measurement errors increase with increasing IF bandwidth
Solution Approach 1:
The patent transforms the measurement approach by changing the frequency domain parameters - measuring phase at multiple discrete frequency points across the IF bandwidth and using polynomial fitting to characterize group delay. This allows accurate measurement across the entire bandwidth range rather than at a single corner frequency, resolving the contradiction between measurement precision and adaptability to different bandwidths.
Solution Approach 2:
The patent segments the IF bandwidth into multiple measurement frequency points (e.g., 5-10 points across the bandwidth). By measuring phase at each segment point and combining results through polynomial fitting, the system achieves accurate group delay measurement across the full bandwidth range, overcoming the limitation of single-point calibration methods.
2Reliability
If multiple MMICs are cascaded for radar applications, then radar performance is improved, but inter-chip phase synchronization becomes more difficult to achieve
Solution Approach 1:
The patent measures and characterizes phase transfer functions and group delay as explicit parameters for each MMIC across the IF bandwidth. By establishing these parameters during calibration, the system can compensate for inter-chip variations through digital signal processing, enabling reliable cascaded operation without increasing hardware complexity.
Solution Approach 2:
The patent implements a calibration feedback mechanism where phase measurements from test signals are used to determine group delay characteristics, which then feed into digital compensation algorithms. This feedback loop enables automatic synchronization correction for cascaded MMICs, reducing the complexity of manual alignment while improving reliability.
3Productivity
If higher IF bandwidths are used, then radar detection capability is enhanced, but phase synchronization challenges increase
Solution Approach 1:
The patent measures phase transfer functions at multiple frequency points spanning the entire IF bandwidth and uses polynomial fitting to model group delay behavior. This approach captures phase variations across the full bandwidth, enabling accurate synchronization even at high IF frequencies where traditional single-point methods fail to maintain precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed solution enables accurate measurement and compensation of phase errors caused by IF or baseband processing, improving inter-chip phase synchronization and enhancing the performance of radar systems operating at higher IF bandwidths.
Implementation Method 1
an up-conversion circuit configured to mix the test signal and the LO signal to obtain an up-converted test signal (in the millimeter-wave frequency range)
Implementation Method 2
a down-conversion circuit configured to mix the up-converted test signal (in the millimeter-wave frequency range) and the LO signal to obtain a down-converted test signal (in the IF frequency range)
Implementation Method 3
a phase detector circuit configured to determine at least one phase of the down-converted test signal
Data Source
AI summary
The present disclosure describes an integrated radar transceiver circuit. The integrated radar transceiver circuit includes a local oscillator, LO, circuit configured to provide an LO signal having a LO frequency, a test signal generator circuit configured to generate a test signal having a test signal frequency component, an up-conversion circuit configured to mix the test signal and the LO signal to obtain an up-converted test signal, a receive channel including a down-conversion circuit configured to mix the up-converted test signal and the LO signal to obtain a down-converted test signal, a phase detector circuit configured to determine a phase of the down-converted test signal and a processor configured to determine delay information related to the integrated radar transceiver circuit based on the determined phase.