Radial Bonding Structures for CTE-Stable Multi-Die Packaging

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Solution Overview

Problem

The semiconductor industry faces challenges in manufacturing smaller semiconductor packages due to manufacturing defects and stress issues arising from coefficient of thermal expansion (CTE) mismatch between semiconductor devices and substrates, which affect electrical and mechanical performance.

Innovation Solution

The formation of bonding structures with elongated shapes aligned along lines emanating from the center of the multi-die structure or substrate, along with seal ring structures, reduces stress and improves electrical and mechanical performance by minimizing misalignment and cracking during thermal treatments.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional packaging technologies are used, then manufacturing process is simpler, but stress and cracking occur due to CTE mismatch

Engineering Contradiction:

Improveelectrical and mechanical performanceVSAvoidbonding structure design

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The bonding structures are designed with non-uniform geometries where the width varies along the length, creating local quality variations that specifically address stress concentration points. The bonding structures have different widths at different locations to better match the local CTE mismatch conditions and reduce overall stress in the package.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent changes the geometric parameters of the bonding structures, specifically the width and orientation angles, to optimize stress distribution. By adjusting these parameters, the bonding structures can better accommodate thermal expansion differences between the semiconductor device and substrate.

Inventive Principle:

Principle #35Parameter changes

2Stress or pressure

If bonding structures are made larger to reduce stress, then stress reduction improves, but misalignment and cracking during thermal treatments worsen

Engineering Contradiction:

Improvestress from CTE mismatchVSAvoidalignment precision

Core Design Contradiction:

Stress or pressureVSManufacturing precision

Solution Approach 1:

The bonding structures are oriented at specific angles relative to the center of the semiconductor device, introducing an angular dimension to the design. This angular orientation, combined with varying widths, creates a geometric configuration that reduces stress while maintaining alignment precision through the elongated shape that resists lateral displacement.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The bonding structures exhibit asymmetric geometry with different widths at different locations along their length. This asymmetry allows the structures to better accommodate differential thermal expansion while maintaining stable alignment, as the wider portions provide stress relief while the narrower portions maintain precise electrical connections.

Inventive Principle:

Principle #4Asymmetry

3Area of stationary object

If smaller packages are created to increase integration density, then area reduction improves, but manufacturing defects and stress issues worsen

Engineering Contradiction:

Improvepackage areaVSAvoidelectrical and mechanical performance

Core Design Contradiction:

Area of stationary objectVSReliability

Solution Approach 1:

Within the reduced package area, the bonding structures incorporate local quality variations through non-uniform width distributions. This allows stress management and reliable electrical connections to be maintained even as the overall package size decreases, preventing manufacturing defects in the compact configuration.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent optimizes the geometric parameters of the bonding structures for small packages by adjusting width ratios and orientation angles. These parameter changes enable the bonding structures to function effectively in reduced areas while maintaining stress resistance and electrical performance.

Inventive Principle:

Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces stress and prevents defects such as delamination and cracking, enhancing the electrical and mechanical integrity of semiconductor packages.

Implementation Method 1

stress issues arising from coefficient of thermal expansion (CTE) mismatch between semiconductor devices and substrates

Methodology Applied

Scientific EffectCoefficient of thermal expansion (CTE) mismatch: Thermal Expansion

Data Source

PatentUS12463150B2Bonding structures in semiconductor packaged device and method of forming same

Publication Date: 2025.11.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device and a method of forming the same are provided. The semiconductor device includes a die structure including a plurality of die regions and a plurality of first seal rings. Each of the plurality of first seal rings surrounds a corresponding die region of the plurality of die regions. The semiconductor device further includes a second seal ring surrounding the plurality of first seal rings and a plurality of connectors bonded to the die structure. Each of the plurality of connectors has an elongated plan-view shape. A long axis of the elongated plan-view shape of each of the plurality of connectors is oriented toward a center of the die structure.