Radiation Detector Pixel Circuit for Continuous Hit Counting
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Solution Overview
Problem
Existing radiation detectors have non-operation periods during counter loading, leading to reduced radiation detection efficiency.
Innovation Solution
A radiation detector design that includes pixel circuits with a comparator, counter, registers, and an adder, allowing for direct data transfer between stages without the need for writing count values, thereby reducing non-operation periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the counter loads the count value from the previous stage during the non-operation period, then the time delay integration operation can be performed, but the radiation detection efficiency decreases due to the counter being non-operational during the loading period
Solution Approach 1:
The pixel circuit in the previous stage transfers the third data (accumulated count value) to the current stage before the counter needs to operate. This preliminary transfer of data allows the counter to start operating immediately without waiting for data loading, thereby reducing the non-operation period and improving radiation detection efficiency
Solution Approach 2:
The register acts as an intermediary to store and transfer the count value between stages. By using the register to hold the third data from the previous stage and transfer it to the current stage, the system eliminates the need for the counter to wait for data loading, thus reducing the non-operation period and improving detection efficiency
2Productivity
If the count value is written to the counter in the previous stage during the non-operation period, then the data can be transferred to the next stage, but the counter cannot perform detection operations during this time
Solution Approach 1:
The system performs the data transfer of third data from the previous stage to the current stage before the counter's operation period begins. This preliminary action ensures that the counter can immediately start detecting radiation without interruption, maximizing the operation period and improving overall detection efficiency
Solution Approach 2:
The register ensures continuous operation of the counter by providing the necessary data (third data) in advance. This eliminates gaps in the counter's operation, maintaining continuous detection capability and improving the duration of useful action during the counter's operation period
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the detection efficiency by increasing the proportion of operation periods for detection, thus enhancing the detection efficiency.
Implementation Method 1
a conversion unit including a plurality of pixels generating carriers in response to incident radiation
Implementation Method 2
a comparator comparing a first signal based on an amount of the carriers with a threshold value and outputting a second signal when the first signal exceeds the threshold value
Implementation Method 3
a counter counting the number of second signals, each of which is the second signal
Implementation Method 4
an adder adding the first data and the second data to generate third data
Data Source
AI summary
A radiation detector includes a plurality of pixel circuits each of which is provided corresponding to each of a plurality of pixels arranged along a predetermined direction and has at least one detection system configured to read out carriers from the corresponding pixel. The at least one detection system includes a counter counting the number of radiation hits, a first register holding first data which is a count value of the counter, a second register holding second data, an adder adding the first data and the second data to generate third data, and a third register holding the third data. The second data is the third data transferred from the third register of the pixel circuit provided corresponding to the pixel adjacent to the corresponding pixel in each of the plurality of pixel circuits.


