Radiation-Induced Upset Defect Location in Integrated Circuits
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Solution Overview
Problem
Current digital testing methods for integrated circuits are inefficient in identifying defect locations without access to layout information, particularly in third-party foundries, as they rely on traditional scan chain testing which may not effectively detect defects in complex circuitry.
Innovation Solution
The use of radiation-induced upsets, specifically laser beams, to induce variations in integrated circuit outputs during testing, allowing for the determination of defect locations and signal path mapping without requiring layout information, by focusing a laser beam on specific locations and recording the timing of output variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional scan chain testing is used without layout information, then testing can be performed in third-party foundries, but defect location identification becomes inefficient and inaccurate
Solution Approach 1:
The patent introduces radiation-induced upsets as an intermediary mechanism to bridge the gap between testing without layout information and accurate defect location identification. By using radiation upsets to deliberately flip flop states and observing the propagation timing through the scan chain, the system can infer defect locations without direct access to layout data, thus resolving the contradiction between testing accessibility and measurement precision
Solution Approach 2:
The patent changes the testing approach by introducing radiation-induced state changes as a controllable parameter. By systematically inducing upsets at different locations and measuring the timing parameters of output variations, the system transforms an unobservable problem (defect location without layout) into a measurable one through parameter manipulation and observation
2Loss of information
If radiation-induced upsets are used to induce variations, then defect locations can be identified without layout information, but the testing process becomes more complex
Solution Approach 1:
The patent employs self-service by using the circuit's own scan chain and flip-flop structures to reveal defect locations. The radiation-induced upsets exploit the existing circuit architecture, and the scan chain naturally propagates and reveals the timing information needed for defect localization, eliminating the need for external layout information while keeping the testing process relatively simple
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables more efficient defect detection and signal path mapping in integrated circuits, even without layout access, by identifying variations in output due to radiation-induced upsets, thus improving the accuracy and efficiency of digital testing.
Implementation Method 1
Laser beams can be used to induce upsets on integrated circuits during digital testing
Data Source
AI summary
Digital testing is performed on an integrated circuit while radiation upsets are induced at locations of the integrated circuit. For each digital test, a determination is made as to whether there is a variation in the output of the digital test from an expected output of the digital test. If there is variation, a time of the variation is indicated. In one example, a location of a defect in the digital circuit can be determined from the times of the variations. In other embodiments, a mapping of the digital circuit can be made from the times.