Radio Arbiter Circuit for Dynamic Network Link Arbitration

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Solution Overview

Problem

Existing wireless communication systems that share a single radio frequency (RF) radio face inefficiencies due to the need for multiple network interfaces to manage competing requests, leading to suboptimal utilization of available radio time and potential conflicts between time-sensitive and non-time-sensitive tasks.

Innovation Solution

A radio arbiter circuit that intelligently switches control between network interfaces based on priority values and request attributes, allowing for dynamic arbitration and efficient sharing of a single radio frequency resource, ensuring optimal utilization and minimizing conflicts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single radio frequency radio is shared between multiple network interfaces, then device complexity and cost are reduced, but conflicts and suboptimal utilization occur when multiple interfaces compete for radio access

Engineering Contradiction:
Improvenumber of radio transceiversVSAvoidradio utilization efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

A radio arbiter circuit is introduced as an intermediary component between multiple network link controllers and a single shared radio transceiver. The arbiter receives access requests from multiple network interfaces, evaluates their priority values, and grants radio access to the highest priority requester. This mediator resolves conflicts without requiring multiple radio transceivers, thereby maintaining cost efficiency while improving radio utilization through intelligent arbitration.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If multiple network interfaces share a single radio transceiver, then hardware cost is reduced, but time-sensitive tasks may be delayed due to arbitration delays

Engineering Contradiction:
Improvehardware configurationVSAvoidtask execution delay
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The system uses priority values as a parameter to dynamically determine radio access timing. Each network link controller assigns a priority value to its access requests, and the radio arbiter uses these priority parameters to make scheduling decisions. Time-sensitive tasks can be assigned higher priority values, ensuring they are granted radio access before lower priority tasks, thereby minimizing execution delays while still sharing the single radio transceiver.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If a radio arbiter circuit is introduced to manage shared radio access, then radio utilization efficiency is improved, but device complexity increases

Engineering Contradiction:
Improveradio access efficiencyVSAvoidarbitration control circuitry
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The radio arbitration function is segmented into a dedicated, standalone arbiter circuit that operates independently from the network link controllers. This segmentation allows the arbitration logic to be implemented as a simple, dedicated hardware module with minimal complexity, while still providing efficient radio access management. The arbiter circuit receives priority values from controllers and implements arbitration logic in a modular, easy-to-implement manner.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10897274B2Shared radio arbitration
Publication Date: 2021.01.19 MICROCHIP TECHNOLOGY INC
  • US10897274B2 patent drawing
  • US10897274B2 patent drawing
  • US10897274B2 patent drawing

AI summary

A radio arbiter circuit is disclosed comprising a digital connection to a radio circuit, which comprises a transmitter, a receiver, and a radio frequency antenna; a first connection to a first network link controller, which comprises a first baseband processor and a first interface to a processor bus; a second connection to a second network link controller, which comprises a second baseband processor and a second interface to a processor bus; a multiplexer for coupling either the first network link controller or the second network link controller to the radio circuit via the digital connection; and a control input to the multiplexer for selecting which network link controller has control of the radio circuit.