Radio Communication System With Check Bit Interpolation

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Solution Overview

Problem

Low-powered radio communication systems in environments like fire alarm systems face battery consumption issues due to environmental noise, as they often require continuous power to distinguish valid data from noise, leading to shortened operation life.

Innovation Solution

A radio communication system where a check bit pattern is inserted into data frames, allowing terminals to intermittently activate receivers and terminate operations upon detecting the pattern's absence, reducing power consumption and extending battery life by distinguishing valid data early.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the receiver continuously monitors radio signals to distinguish valid data from noise, then the reliability of data reception is improved, but the battery consumption increases

Engineering Contradiction:
Improvedata reception reliabilityVSAvoidbattery consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies preliminary action by inserting a check bit pattern at a predetermined cycle into the data frame before transmission. This allows the receiving terminal to detect the presence of valid data in advance by checking for the check bit pattern, enabling early termination of reception when noise is detected without needing to process the entire data frame, thus reducing battery consumption while maintaining reliable data reception

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The check bit pattern acts as an intermediary element between the transmitted data and the noise environment. By embedding this distinctive pattern at regular intervals, the system creates a detectable marker that allows the receiver to distinguish valid data from environmental noise without requiring continuous full-signal processing, thereby reducing power consumption while ensuring reliable reception

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the receiver processes the entire data frame to ensure complete data reception, then the completeness of data reception is improved, but the power consumption increases

Engineering Contradiction:
Improvedata reception completenessVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The check bit pattern inserted at a predetermined cycle serves as a preliminary indicator of valid data. The receiving terminal can detect this pattern early in the reception process and determine whether the incoming signal is valid data or noise, allowing early termination of the reception process when noise is detected, thus avoiding unnecessary power consumption from processing complete invalid data frames while ensuring complete reception of valid data

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies partial action by not requiring the receiver to process the entire data frame to determine validity. Instead, the receiver performs partial processing by checking for the check bit pattern at predetermined intervals, which is sufficient to identify noise and terminate reception early, avoiding the excessive power consumption of processing complete invalid frames while ensuring complete reception of valid data

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentEP2126868B1Radio communication system
Publication Date: 2010.11.17 PANASONIC ELECTRIC WORKS CO LTD
  • EP2126868B1 patent drawingFigure 1
  • EP2126868B1 patent drawingFigure 2
  • EP2126868B1 patent drawingFigure 3

AI summary

A radio communication system minimizes power consumption against noises. The system includes a first radio terminal (10A) with a first transmitter (40A) for transmitting a first data indicative of a specific event, and a second radio terminal (40A) with a battery (14B) and a receiver (20B). The first radio terminal (10A) includes a first bit interpolator (32A) which inserts a check bit pattern of "01010101" at a predetermined cycle into one frame of the first data. The second radio terminal (10B) has a second power controller (60B) which intermittently activates the second receiver (20B) at predetermined intervals in order to receive the bit-interpolated data from the first transmitter. A check bit detector (24B) is included in the second radio terminal (10B) to detect the check bit pattern from within the bit interpolated data and to issue a stop signal immediately upon occurrence of that the check bit pattern fails to appear at said predetermined cycle within a predetermined time frame shorter than one frame length of the first data. In response to the stop signal, the power controller of the second radio terminal terminates a current receiving operation.