Radio Unit Data Compression Using MAC-Based Bit Shifting
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Solution Overview
Problem
Existing 5G radio data communication systems face challenges in efficiently performing bit shifting and concatenation operations due to the limitations of digital signal processors (DSPs) supporting only simplified instruction sets, which are not suitable for high-power processor-based compression algorithms.
Innovation Solution
Implementing a radio data communication system with vector signal processors (VSPs) that perform bit shifting operations using multiply-accumulate (MAC) operations, allowing for efficient data compression and decompression within each radio unit, reducing the need for high-power processors and simplifying instruction sets.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If high-power processors are used to perform bit shifting and concatenation operations for data compression, then data compression functionality is achieved, but power consumption and hardware complexity increase
Solution Approach 1:
The patent replaces traditional mechanical bit shifting operations with arithmetic operations (multiplication by powers of 2) that can be executed by DSP MAC units. This substitution allows the use of lower-power DSP processors instead of high-power general-purpose processors, thereby reducing power consumption while maintaining data compression functionality.
Solution Approach 2:
The patent changes the representation parameters of bit shifting operations into equivalent arithmetic operations. By transforming bit shift operations into multiplication operations with powers of 2, the system can leverage the efficient MAC units in DSP processors, reducing the computational power required and thus lowering power consumption.
2Device complexity
If DSPs with simplified instruction sets are used to reduce hardware complexity, then hardware complexity is reduced, but bit shifting and concatenation operations cannot be performed
Solution Approach 1:
The patent substitutes bit shifting operations (which require complex instruction sets) with arithmetic multiplication operations that can be performed by simplified DSP MAC units. This allows DSPs with reduced instruction sets to perform data compression functions that traditionally required more complex processors.
Solution Approach 2:
The patent introduces intermediate arithmetic operations as mediators between the simplified DSP instruction set and the required data compression functionality. By using multiplication and addition operations as intermediaries, the system achieves bit shifting and concatenation effects without requiring native bit manipulation instructions.
3Productivity
If multiple DSP units are configured in parallel to increase throughput, then data processing throughput is improved, but the lack of bit shifting instructions limits compression algorithm implementation
Solution Approach 1:
The patent replaces bit shifting operations with arithmetic operations that can be efficiently executed by DSP MAC units in parallel configurations. This substitution enables multiple DSP units to be configured in parallel for high-throughput processing while fully implementing compression algorithms that traditionally required bit shifting instructions.
4Adaptability or versatility
If traditional bit shifting operations are used for data compression, then compression algorithms can be implemented, but the operations are not supported by simplified DSP instruction sets
Solution Approach 1:
The patent substitutes bit shifting operations with equivalent arithmetic operations (multiplication by powers of 2) that are supported by simplified DSP instruction sets. This allows compression algorithms to be implemented on DSPs with reduced instruction sets, eliminating the need for complex bit manipulation instructions.
Solution Approach 2:
The patent transforms the operational parameters of bit shifting into arithmetic operation parameters. By changing the representation from bit-level operations to arithmetic operations, the system achieves the same compression functionality using only simplified instructions available in DSP instruction sets.
Data Source
AI summary
A radio data communication system includes a plurality of radio units, each radio unit having a transceiver and an antenna, and a gateway unit connected to each of the plurality of radio units via a first data bus. Each transceiver in the plurality of radio units is configured to receive a data signal from a respective antenna, compress the received data signal using a data compression algorithm, and transmit the compressed data signal to the gateway unit via the first data bus. The data compression algorithm includes a bit shifting operation performed by a multiply-accumulate operation.