Radio Receiver AGC via ADC Sampling Clock Control
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Solution Overview
Problem
Existing radio receivers face challenges in aligning receiver signals with ADC dynamic range without introducing noise floor and altering pre-filter cut-off frequency when switching gain steps, particularly under high signal conditions.
Innovation Solution
The radio receiver adjusts the sampling clock frequency of the analogue-to-digital conversion means in discrete steps, allowing for automatic gain control without affecting the filter transfer characteristic or ADC noise floor, by varying the frequency dividing ratio based on the strength of the output signal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If resistance values are switched to adjust gain steps in IF circuits, then gain control is achieved, but ADC noise floor and pre-filter cut-off frequency are adversely affected
Solution Approach 1:
The patent changes the controlling parameter from resistance values to sampling frequency. By varying the sampling frequency in discrete steps, the system achieves gain control without altering the resistance values that determine ADC noise floor and pre-filter cut-off frequency, thus resolving the contradiction between gain adaptability and signal quality
Solution Approach 2:
The patent replaces the mechanical/electrical resistance switching mechanism with a frequency-based control mechanism. Instead of physically switching resistance values in the IF circuit, the system uses frequency division of the sampling clock to achieve gain adjustment, eliminating the adverse effects on ADC noise floor and filter characteristics
2Adaptability or versatility
If resistance values are switched to adjust gain steps in IF circuits, then gain control is achieved, but filter transfer characteristic is altered
Solution Approach 1:
The patent changes the controlling parameter from resistance values to sampling frequency. By varying the sampling frequency in discrete steps, the system achieves gain control without altering the resistance values that determine filter transfer characteristic, thus resolving the contradiction between gain adaptability and filter stability
Solution Approach 2:
The patent replaces the mechanical/electrical resistance switching mechanism with a frequency-based control mechanism. Instead of physically switching resistance values in the IF circuit, the system uses frequency division of the sampling clock to achieve gain adjustment, eliminating the adverse effects on filter transfer characteristic
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables effective automatic gain control and fine-tuning of the receiver gain without compromising the ADC noise floor or filter characteristics, improving signal alignment and reducing complexity in IF circuits.
Implementation Method 1
a frequency dividing means coupled to the voltage controlled oscillator for providing the sampling clock frequency
Implementation Method 2
mixing means for demodulating a received modulated radio frequency signal using a local oscillator signal
Data Source
Figure 1
Figure 2~3
AI summary
A radio receiver comprises an input (14) for a modulated radio frequency signal, a frequency down converter (16) coupled to the input, the frequency down converter including quadrature mixers (32,34) for demodulating a received modulated radio frequency signal using a local oscillator signal. An analogue-to-digital converter (54, 56) is coupled to receive demodulated signalsfrom the mixing means. The analogue-to-digital converter, which may comprise a continuous time sigma delta converter, has an input for a sampling clock frequency(f s ). A voltage controlled oscillator (38) providesthe local oscillator signaland supplies afrequency divider(60, 94) used to providethe sampling clock frequency.The dividing ratio (1/A) of the frequency divideris variablein response to variations in the strength of an 15 output signal from the digital-to-frequency converter and the variations in the frequency of the sampling clock frequencyvary the gain of the analogue-to- frequency converterthereby providing automatic gain control.