Multichannel Radio Sample Synchronization Using Packet Timestamps
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Solution Overview
Problem
Multichannel radio signal reception systems face challenges in synchronizing reception channels due to different sampling frequencies and time shifts, leading to instability and unsynchronizability, especially when the sampling frequency is high and beyond the capabilities of programmable digital components.
Innovation Solution
A synchronization device is inserted between the interface module and the digital signal processing module, utilizing a memory with independent access for storing digitized signal samples, registers for packet manipulation, and an automaton for calculating addresses to compensate for time shifts and synchronize samples across channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If synchronization signals are distributed using serial or star architectures to synchronize demultiplexers, then synchronization between channels is achieved, but the system becomes complex and unstable due to propagation time drift at high sampling frequencies
Solution Approach 1:
The invention extracts the synchronization function from the signal path by using timestamp information embedded in data packets. Each packet carries its own timing metadata, allowing receivers to independently determine arrival times without relying on separate synchronization signal distribution networks. This eliminates the complex serial or star architectures while maintaining synchronization stability.
Solution Approach 2:
The invention introduces timestamp information as an intermediary carrier of synchronization data. Instead of distributing synchronization signals separately, the timestamps embedded in each data packet serve as the mediator that conveys timing information through the data stream itself, eliminating the need for dedicated synchronization signal paths and their associated complexity.
2Measurement precision
If analog-to-digital converters use different sampling frequencies to solve spectrum aliasing, then the Shannon condition is satisfied, but synchronization between reception channels becomes impossible using traditional synchronization signals
Solution Approach 1:
Each reception channel independently processes packets from its own sampling frequency using the timestamp information embedded in each packet. The system does not require centralized coordination or matching sampling frequencies across channels. Each channel self-synchronizes by comparing its received packet timestamps with its local timing reference, enabling synchronization even with different sampling frequencies.
Solution Approach 2:
The invention changes the synchronization approach from signal-based to timestamp-based, allowing each channel to operate at its own sampling frequency parameter. The timestamp metadata in each packet enables the system to handle variable sampling frequencies across channels without requiring them to be synchronized, thus resolving the contradiction between aliasing avoidance and inter-channel synchronizability.
3Manufacturing precision
If demultiplexers operate at very high sampling frequencies, then digitized signal quality is maintained, but time shifts during start-up induce sample packet misalignment between channels
Solution Approach 1:
The invention embeds timestamp information in each data packet before transmission, recording the exact sampling instant at the source. This preliminary timing information allows receivers to compensate for any time shifts or delays that occur during transmission and processing. By knowing the original sampling time from the timestamp, the system can realign packets from different channels even if demultiplexers operate at high frequencies with potential start-up time shifts.
Data Source
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AI summary
The invention relates to a synchronization device (26i) designed to be inserted into a reception channel of a multichannel radio signal reception system between an interfacing module (10i) and a digital signal processing module (12i), the interfacing module being designed to receive digitized signal samples from an analogue-to-digital converter having a natural sampling frequency (Fei ) and to provide packets of P digitized signal samples at a first frequency (Fei /P). This device has a memory (25i) accessible in write mode and in read mode by independent access operations, connected at the output of the interfacing module (10i), and a first set of registers (23i) supplied at input by first packets of P samples read from said memory (25i) from a read address, at a second frequency, and a second set of registers (25i) supplied by the outputs of the first set of registers and designed to deliver second packets of P samples at the rate of the second frequency, with a delay of one period of the second frequency (FT). The synchronization device supplies, at output, pluralities of third packets of P samples forming successive series each containing a number of samples in series corresponding to one and the same duration, and each first sample of a series of a first reception channel corresponds in time to the first sample of a series of another reception channel.