Radix-4 Booth MAC Circuit With Differential RRAM Weight Storage
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Solution Overview
Problem
Conventional neuromorphic computing systems face limitations in computing efficiency and power consumption due to their reliance on binary coding and hierarchical storage structures, which hinder large-scale parallel computing and are not suitable for high-precision deep neural networks.
Innovation Solution
A multiplication and accumulation circuit based on radix-4 booth code and differential weight storage, utilizing a resistive random-access memory (RRAM) for in-memory parallel computing, reduces power consumption and bit width, enabling efficient large-scale parallel computing by encoding input data and storing weights as positive and negative differentials.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional binary coding and hierarchical storage structures are used, then storage capacity is achieved, but computing efficiency deteriorates due to separation of storage and computing units
Solution Approach 1:
The patent merges storage and computing units into a unified in-memory computing architecture where RRAM devices simultaneously perform storage and multiplication operations. The crossbar array integrates weight storage in RRAM conductance values with input signal routing and multiplication in the same physical structure, eliminating the need for separate storage and computing units.
Solution Approach 2:
The patent replaces conventional digital multiplication circuits (multipliers) with analog multiplication based on Ohm's law and Kirchhoff's current law. Current through RRAM devices naturally performs multiplication of input voltage and weight conductance, substituting complex digital logic with simple physical laws.
2Use of energy by moving object
If hierarchical storage structure (SRAM-DRAM-FLASH) is used, then storage capacity is achieved, but power consumption increases due to frequent data transfer
Solution Approach 1:
The patent combines storage and computing functions in the same RRAM-based crossbar array, eliminating the need for data transfer between separate storage and computing units. Weight values are stored directly in RRAM devices and used immediately for multiplication operations, removing the energy-consuming data movement step.
Solution Approach 2:
The RRAM devices perform multiplication operations automatically through their physical properties (conductance-voltage-current relationships) without requiring external computational resources. The system uses the inherent electrical characteristics of RRAM to perform computing tasks, making the storage medium itself computationally active.
3Productivity
If binary coding is used for input data, then simplicity is maintained, but computing performance deteriorates for deep neural networks requiring higher precision
Solution Approach 1:
The patent changes the numerical representation parameter from binary to radix-4 booth code. This encoding scheme represents numbers in base-4 with signed digits, allowing higher precision and larger dynamic range using fewer bits. The encoding circuit converts binary input to radix-4 booth code before processing through the crossbar array.
Solution Approach 2:
The patent uses a composite approach combining radix-4 booth code encoding with differential weight storage in RRAM. The differential representation (storing both positive and negative weight values) combined with radix-4 encoding creates a synergistic system that achieves high precision for deep neural network computations.
4Device complexity
If conventional multiplication and addition circuits are used, then computing accuracy is achieved, but device complexity and power consumption increase
Solution Approach 1:
The patent substitutes digital multiplication circuits with analog multiplication based on electrical conduction. Current through RRAM devices naturally computes the product of input voltage and weight conductance. Addition is performed through Kirchhoff's current law at node points, replacing complex digital adder circuits with simple electrical node summation.
Solution Approach 2:
The patent introduces analog voltage and current signals as intermediaries between digital input data and digital output results. The crossbar array processes analog signals for multiplication and accumulation, then an ADC circuit converts the analog result back to digital form, enabling accurate computation with simplified hardware.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution significantly reduces power consumption and improves computing performance for neuromorphic chips, enabling high-precision and high-performance deep neural networks with low energy consumption by eliminating the need for multipliers and adders, and achieving efficient parallel computing.
Implementation Method 1
multiply the original input data after being encoded by the weight values stored to obtain multiplication results
Implementation Method 2
respectively accumulate a positive value and a negative value of each multiplication result
Data Source
AI summary
The present disclosure provides a multiplication and accumulation circuit based on radix-4 booth code and differential weight storage. The circuit includes an input data encoding circuit, a differential weight storage circuit, an integral calculation circuit and a differential ADC circuit. The input data encoding circuit is configured to encode original input data. The differential weight storage circuit is configured to store weight values, and multiply the original input data after being encoded by the weight values stored to obtain multiplication results. The integral calculation circuit is configured to respectively accumulate a positive value and a negative value of each multiplication result. The differential ADC circuit is configured to perform analog-to-digital conversion on a difference between accumulated results of the positive values and the negative values to obtain a digital multiplication and accumulation result.