RAID Cache Controller Redirecting Attached Memory to Embedded Storage

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Solution Overview

Problem

Current RAID storage systems face inefficiencies in data caching due to slower access times of attached memory, which can hinder the performance of computer systems by not fully utilizing faster embedded memory for data storage and retrieval operations.

Innovation Solution

Implementing a data store cache controller that redirects read and write instructions from attached memory to embedded memory within the RAID storage system, allowing for faster data access and management by determining valid cache lines and allocating memory efficiently through a deallocate engine.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If data caching is performed using attached memory in current RAID storage systems, then the system can store data temporarily, but the access speed is limited by the slower attached memory performance

Engineering Contradiction:
Improvedata access speedVSAvoidmemory architecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the memory system into two distinct parts: attached memory for temporary data storage and embedded memory for high-speed caching. This segmentation allows each memory type to be optimized for its specific function, with embedded memory providing fast access for frequently accessed data while attached memory handles bulk storage, thereby resolving the contradiction between speed and complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a cache controller as an intermediary component that manages data transfer between attached memory and embedded memory. This mediator coordinates the caching operations, redirecting read/write instructions appropriately and maintaining data consistency, thus enabling faster access speeds while managing the complexity through centralized control.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If faster embedded memory is utilized for data caching, then data processing speeds improve, but the system complexity increases due to additional memory management requirements

Engineering Contradiction:
Improvedata processing speedVSAvoidmemory management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent implements preliminary action by pre-allocating portions of embedded memory as cache space and pre-establishing the cache controller infrastructure before data processing operations begin. This preliminary setup enables the system to immediately utilize fast embedded memory for caching without adding management complexity during actual data processing operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The cache controller is designed with multi-functionality, handling both read and write operations, cache line validation, and data synchronization between attached and embedded memory. This universal approach consolidates multiple memory management functions into a single component, improving productivity while containing overall system complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If embedded memory is used for caching RAID stripe and parity data, then storage efficiency improves, but the device complexity increases due to redirecting operation instructions

Engineering Contradiction:
Improvestorage efficiencyVSAvoidinstruction redirection complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The cache controller serves as an intermediary that intercepts and redirects operation instructions between attached memory and embedded memory. It examines read and write instructions, determines whether data resides in cache, and redirects instructions appropriately, thereby improving storage efficiency while managing instruction redirection complexity through a dedicated control component.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The embedded memory cache is designed to be self-service through automatic cache line validation and data synchronization mechanisms. The cache controller automatically determines whether cache lines are valid and handles data consistency without requiring complex external management, thus improving storage efficiency while minimizing the complexity of instruction redirection.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10268589B2Caching data in a redundant array of independent disks (RAID) storage system
Publication Date: 2019.04.23 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US10268589B2 patent drawing
  • US10268589B2 patent drawing
  • US10268589B2 patent drawing

AI summary

Caching data in a redundant array of independent disks (RAID) storage system including receiving an operation instruction targeting a location in an attached memory of the RAID storage system, wherein the attached memory temporarily stores data for storage on RAID storage devices, and wherein the operation instruction is one selected from a group consisting of a read instruction and a write instruction; redirecting, based on a content of the operation instruction, the operation instruction from the attached memory to the embedded memory on the RAID storage system; and servicing the operation instruction by accessing a portion of the embedded memory corresponding to the location in the attached memory of the RAID storage system.