RAID Controller CDB Pointer Forwarding for Performance

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Solution Overview

Problem

Current RAID controllers experience significant CPU overhead due to the need for CPU intervention in coordinating DMA engine and SAS core operations, limiting overall performance in RAID operations.

Innovation Solution

Implementing a method where DMA engines and SAS cores can forward Command Descriptor Block (CDB) pointers to each other without CPU intervention, allowing them to complete their respective tasks independently, thereby reducing the need for CPU interrupts and enhancing parallel processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If CPU intervention is used to coordinate DMA engine and SAS core operations, then operational coordination and reliability are improved, but CPU overhead increases and performance decreases

Engineering Contradiction:

Improveoperational coordinationVSAvoidRAID performance

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The DMA engine and SAS core are enabled to autonomously coordinate their operations through direct interaction mechanisms (doorbell registers, command queues) without requiring CPU intervention. Each component can independently initiate and complete operations, with the DMA engine able to autonomously submit commands to the SAS core and receive completion status, eliminating the need for CPU-mediated coordination while maintaining operational reliability

Inventive Principle:

Principle #25Self-service

Solution Approach 2:

The patent introduces intermediary communication mechanisms including doorbell registers and command queues that facilitate direct communication between the DMA engine and SAS core. These intermediaries act as communication channels that allow the two components to exchange commands and status information without CPU involvement, resolving the contradiction by providing a reliable coordination path that bypasses the CPU overhead

Inventive Principle:

Principle #24Intermediary (Mediator)

2Loss of information

If CPU interrupts are used for coordination, then operational status monitoring is improved, but system performance and throughput decrease

Engineering Contradiction:

Improveoperational status monitoringVSAvoidsystem throughput

Core Design Contradiction:

Loss of informationVSProductivity

Solution Approach 1:

The patent implements continuous operation by eliminating interrupt-driven coordination. The DMA engine and SAS core can continuously process commands and data transfers without being halted by CPU interrupts. Completion status is monitored through polling of status registers or through direct notification mechanisms rather than interrupts, allowing the system to maintain continuous useful action and improve throughput while still monitoring operational status

Inventive Principle:

Principle #20Continuity of useful action

Solution Approach 2:

The patent replaces the interrupt-based mechanical coordination system with a more efficient communication mechanism. Instead of using CPU interrupts to signal operational status, the system uses direct register access, command queues, or notification flags that allow status monitoring without the performance penalty of interrupt handling, effectively substituting a slower mechanical interrupt system with a faster software-based status checking mechanism

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8151014B2RAID performance using command descriptor block pointer forwarding technique

Publication Date: 2012.04.03 HEWLETT PACKARD ENTERPRISE DEV LP

AI summary

The apparatus in one example may have: at first and second processing devices; at least one sequence of processes for the first and second devices; the at least one sequence having a command forward instruction such that, after the first processing device completes processing a first process of the at least one sequence of processes, the first processing device forwards, without producing an interrupt, the command forward instruction to the second processing device to effect processing of a second process of the at least one sequence of processes.