RAID Redundant Code Generation Without Bit Shift Overhead
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Solution Overview
Problem
Existing RAID systems face processing burdens due to the high computational demands of Galois field operations required for generating and restoring redundant codes, particularly when using general-purpose CPUs, which necessitate either inefficient bit shift and data mask operations or costly dedicated hardware.
Innovation Solution
A method and device that perform Galois field operations without special hardware by executing exclusive OR operations in data units, eliminating the need for bit shift and data mask operations, using a CPU with an exclusive OR arithmetic circuit and memory to generate and restore redundant codes efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If Galois field operations are performed using general-purpose CPUs, then device complexity is reduced, but processing speed deteriorates due to the need for bit shift and data mask operations
Solution Approach 1:
The patent changes the operational parameters of Galois field operations by performing XOR operations on data units (e.g., bytes or words) rather than individual bits. This parameter change eliminates the need for bit shift and data mask operations, allowing general-purpose CPUs to execute Galois field operations at speeds comparable to dedicated hardware while maintaining device simplicity
Solution Approach 2:
The patent substitutes the mechanical bit-level manipulation system (bit shift and mask operations) with a more efficient data-unit level XOR operation system. This substitution leverages the native capabilities of general-purpose CPUs to perform operations on entire data units simultaneously, eliminating the sequential bit-by-bit processing that slowed down previous implementations
2Speed
If dedicated hardware is used for Galois field operations, then processing speed is improved, but device complexity and cost increase
Solution Approach 1:
The patent makes general-purpose CPUs universal by enabling them to perform Galois field operations efficiently through data-unit XOR operations. This eliminates the need for separate dedicated hardware circuits, allowing the same CPU to handle both general computing tasks and RAID redundancy operations without requiring specialized Galois field processing units
Solution Approach 2:
The patent copies the functional capability of dedicated Galois field hardware into software-based XOR operations that run on general-purpose CPUs. By replicating the computational function rather than requiring physical dedicated hardware, the system achieves similar processing speeds without the complexity and cost of specialized circuits
3Adaptability or versatility
If bit shift and data mask operations are used for Galois field operations, then compatibility with general-purpose CPUs is maintained, but processing time increases
Solution Approach 1:
The patent extracts and eliminates the time-consuming bit shift and data mask operations from the Galois field computation process. By removing these intermediate steps and directly performing XOR operations on data units, the patent maintains CPU compatibility while dramatically reducing computation time
Solution Approach 2:
Instead of breaking down data into individual bits and performing sequential operations (the traditional approach), the patent inverts the approach by operating directly on complete data units. This inversion eliminates the need for bit-level manipulation and allows the CPU to process entire data units in parallel, significantly reducing computation time
Data Source
AI summary
A redundant code generation method includes: dividing original data into data strings; dividing each data string into a number of bit strings that accords with an extended Galois field operation; storing each of the bit string in a different memory area of a memory; and executing an exclusive OR operation among vectors, which are extracted from the respective bit strings stored in the memory, according to an operational expression to compute bit strings that make up redundant code data strings without carrying out a bit shift operation within the vectors. A predetermined plural number of bits is taken as a data unit and the number of bits as elements constituting each vector is equal to the data unit. The operational expression includes a companion matrix of a primitive polynomial of the Galois field and defined the generation of the redundant code data strings.