RAID Engine Microcontroller for Flash Memory Data Integrity

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Solution Overview

Problem

Existing data storage devices face challenges in ensuring the accuracy and fault tolerance of user data due to the time-consuming generation of RAID checking codes, which affects system performance and efficiency in flash memory operations.

Innovation Solution

A data storage device incorporating a microcontroller with a RAID engine that generates and programs RAID checking codes alongside user data, using a RAID system to ensure data integrity and performance by encoding user data and storing it with corresponding RAID checking codes in a stripe of pages across multiple logical units, allowing for efficient data recovery and system reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If RAID checking code is generated and stored alongside user data to ensure data integrity, then data accuracy and fault tolerance are improved, but system performance and writing efficiency deteriorate due to the time-consuming encoding process

Engineering Contradiction:
Improvedata accuracyVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by pre-generating RAID checking codes during the data writing process before actual storage operations are completed. The microcontroller generates RAID checking codes for user data and stores them in reserved physical addresses alongside the user data in a stripe structure, so that when data recovery is needed, the checking codes are already available without requiring additional processing time.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If RAID checking code generation is performed in real-time during data writing, then data integrity is ensured, but writing speed and operational efficiency are reduced

Engineering Contradiction:
Improvedata integrityVSAvoidwriting speed
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The patent merges the user data writing operation with the RAID checking code generation and storage operations into a single integrated process. The microcontroller simultaneously handles user data programming to target physical addresses and RAID checking code programming to reserved physical addresses within the same stripe structure, eliminating sequential processing delays and improving writing speed while maintaining data integrity.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If RAID checking codes are stored in reserved physical addresses alongside user data, then fault tolerance is enhanced, but storage space utilization is reduced

Engineering Contradiction:
Improvefault toleranceVSAvoidstorage space
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent segments the storage structure into stripes that contain both user data and RAID checking codes. Each stripe is divided into pages, and within each page, specific physical addresses are reserved for RAID checking codes while other addresses store user data. This segmentation allows efficient organization of data and checking codes, enabling the system to provide fault tolerance through RAID while maintaining reasonable storage space utilization through structured allocation.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10783037B2Data storage device, host device for data storage device operations, and data writing method
Publication Date: 2020.09.22 SILICON MOTION INC
  • US10783037B2 patent drawing
  • US10783037B2 patent drawing
  • US10783037B2 patent drawing

AI summary

A data storage device with fault-tolerant design. The data storage device has a RAID (Redundant Array of Independent Disks) engine that generates RAID checking code for user data requested in a write command. The user data is programmed to a non-volatile memory according to a target physical address indicated in the write command. The RAID checking code is programmed to the non-volatile memory according to a reserved physical address. The user data and the RAID checking code are programmed to a stripe of pages within a stripe of blocks.