RAID File Server ECC Distribution via Switch Module

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Solution Overview

Problem

In RAID systems, a single central processing unit can cause bottlenecks and increase latency due to variable and time-consuming error checking and correcting (ECC) processing, limiting the ability to process subsequent data blocks concurrently.

Innovation Solution

A redundant array of independent disks (RAID) system with multiple target processing modules and a switch module that allows overlapping ECC processing across multiple storage arrays, using a data processing module to distribute ECC tasks and manage RAID storage levels, thereby reducing processing bottlenecks and enhancing throughput.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single central processing unit is used for ECC processing, then the system structure is simple, but processing bottleneck and latency increase

Engineering Contradiction:
Improvesystem structureVSAvoidprocessing throughput
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent divides the single central processing unit into multiple target processing modules (TPMs), each capable of independently performing ECC processing. This segmentation allows parallel processing of multiple data blocks simultaneously, eliminating the bottleneck caused by a single CPU while maintaining manageable system complexity through modular architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-threaded sequential processing model to a multi-threaded parallel processing model by introducing multiple target processing modules that can handle different data blocks concurrently. This dimensional change in processing architecture enables simultaneous ECC operations across multiple storage arrays.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of operation

If ECC processing is performed sequentially, then processing is simple to manage, but latency increases

Engineering Contradiction:
Improveprocessing managementVSAvoidprocessing latency
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent implements continuous parallel ECC processing across multiple target processing modules, where each module continuously processes different data blocks without waiting for others to complete. This eliminates idle time and maintains continuous useful action, significantly reducing overall processing latency while preserving management simplicity through standardized module interfaces.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If multiple target processing modules are used for parallel ECC processing, then throughput increases, but device complexity increases

Engineering Contradiction:
Improveprocessing throughputVSAvoidsystem architecture
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent creates identical copies of the target processing module architecture, where each TPM is a replica capable of performing the same ECC functions. This copying approach increases throughput through parallelism while managing complexity by using standardized, interchangeable modules rather than unique complex components.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

Each target processing module is designed as a universal unit capable of handling various RAID levels and different data block processing tasks. This multi-functionality reduces overall system complexity by using a single versatile module type rather than specialized components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8495416B2File server for redundant array of independent disks (RAID) system
Publication Date: 2013.07.23 MARVELL ASIA PTE LTD
  • US8495416B2 patent drawing
  • US8495416B2 patent drawing
  • US8495416B2 patent drawing

AI summary

A system comprising an interface, a plurality of storage arrays, a data processing module, and a switch module. The interface receives data blocks from a host via a network. The data processing module connected between the interface and the plurality of storage arrays, wherein the data processing module is configured to (i) determine which ones of the data blocks each of a plurality of target processing modules of the storage arrays is to perform error checking and correcting processing, and (ii) transfer each of the data blocks from the interface to a respectively assigned one of the plurality of target processing modules. The switch module provides communication paths between the data processing module and the plurality of storage arrays.