Non-Contiguous Bit Encoding for RAID Parity Processing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current RAID systems using Galois fields for parity calculations are limited by sequential bit arrangement and lack efficient parallel processing, which hampers performance and data recovery efficiency.

Innovation Solution

The method involves encoding data in increments of n bits using Galois field elements, leveraging vector architecture to perform parallel calculations, and generating parity information for RAID systems like RAID 5, RAID 6, and RAID 10, enabling efficient data recovery and improved performance metrics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If sequential bit arrangement is used for Galois field elements, then data encoding is simple, but processing speed and parallel computation capability are limited

Engineering Contradiction:
Improveprocessing speedVSAvoidencoding complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent segments the bit arrangement into non-contiguous groups, where bits are selected in increments of n bits rather than sequentially. This segmentation allows each segment to be processed independently in parallel, significantly improving processing speed while maintaining manageable encoding complexity through systematic bit selection patterns.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential one-dimensional bit arrangement to a multi-dimensional bit selection approach where bits are arranged in increments of n bits. This dimensional change enables simultaneous access to multiple bits that would otherwise require sequential processing, thereby enhancing parallel computation capability and processing speed.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If traditional sequential processing is used for parity calculations, then implementation is straightforward, but data recovery efficiency is reduced

Engineering Contradiction:
Improvedata recovery efficiencyVSAvoidcalculation complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent performs preliminary action by pre-arranging bits in non-contiguous groups during the encoding phase, so that when data recovery is needed, the pre-grouped bits can be directly accessed and processed in parallel without requiring complex reorganization. This preliminary arrangement significantly accelerates data recovery operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent ensures continuity of useful action by maintaining the non-contiguous bit arrangement throughout both encoding and decoding operations. This consistent arrangement allows parallel processing to continue uninterrupted during data recovery, maximizing productivity while the systematic nature of the arrangement keeps calculation complexity manageable.

Inventive Principle:
Principle #20Continuity of useful action

3Power

If parallel processing is implemented using vector architecture, then performance is improved, but hardware requirements and system complexity increase

Engineering Contradiction:
Improvecomputational powerVSAvoidsystem complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the bit arrangement parameter from sequential to non-contiguous increments of n bits. This parameter change enables the system to leverage vector architecture and parallel processing capabilities, significantly increasing computational power. The systematic nature of the parameter change keeps the increased system complexity manageable and predictable.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240394144A1System and method of encoding data for performing vector calculations in raid storage systems
Publication Date: 2024.11.28 FEDOROV ANDREY
  • US20240394144A1 patent drawing
  • US20240394144A1 patent drawing
  • US20240394144A1 patent drawing

AI summary

The technology described herein involves encoding data representing an array of finite field elements for performing calculations when creating RAID storage systems, characterized in that the bits encoding each element of the Galois field are not arranged sequentially, one after the other, but in increments of n bits, where n>1.