RAID Storage Parity Transfer to Cut Controller Load

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Solution Overview

Problem

The existing storage system's performance is bottlenecked by the increased load on the storage controller due to storing intermediate parity in both cache memory and nonvolatile memory, and this can result in data loss during system faults.

Innovation Solution

A storage system with a processor, buffer memory, and cache memory, where the processor manages data transfer between storage devices and a system controller, reducing the load on the cache memory by transferring intermediate parity directly between storage devices without storing it in the cache memory, and using a RAID group configuration to maintain redundancy and avoid data loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the intermediate parity is stored in both the cache memory and the nonvolatile memory, then the data reliability is improved, but the load on the storage controller increases and performance deteriorates

Engineering Contradiction:
Improvedata reliabilityVSAvoidstorage controller performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent extracts the intermediate parity storage function from the storage controller and relocates it to the storage devices themselves. The storage devices now store intermediate parity in their own memory, eliminating the need for the storage controller to maintain copies in both cache and nonvolatile memory, thus reducing controller load while maintaining data reliability.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The storage devices are empowered to manage their own intermediate parity storage and retrieval operations. Each storage device can independently access and use its stored intermediate parity for data reconstruction, reducing dependency on the storage controller and improving overall system performance.

Inventive Principle:
Principle #25Self-service

2Productivity

If the intermediate parity is stored in either the cache memory or the nonvolatile memory, then the storage controller load is reduced, but data loss occurs during system faults

Engineering Contradiction:
Improvestorage controller performanceVSAvoiddata safety
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent combines the intermediate parity storage capability directly within the storage devices, merging the functions of data storage and intermediate parity storage into a single location. This eliminates the need to choose between cache and nonvolatile memory in the controller, as both are now available at the storage device level, ensuring data safety while reducing controller burden.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If the storage controller manages all intermediate parity operations, then data integrity is maintained, but the system complexity and processing overhead increase

Engineering Contradiction:
Improvedata integrityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the intermediate parity management responsibilities from the storage controller and assigns them to individual storage devices. Each storage device independently manages its own intermediate parity, dividing the complex centralized management task into simpler distributed operations, thereby reducing system complexity while maintaining data integrity.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS8984374B2Storage system and storage control apparatus
Publication Date: 2015.03.17 HITACHI VANTARA LTD
  • US8984374B2 patent drawing
  • US8984374B2 patent drawing
  • US8984374B2 patent drawing

AI summary

A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.