Geometry-Aware RAID Parity Placement for Flash Word Lines
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Flash memory devices face issues with unfilled word lines and mixed-device implementations, leading to reduced read reliability and failure mechanisms such as stuck word lines, which are not adequately addressed by existing technologies.
Innovation Solution
A geometry-aware method of writing parity data to RAID stripes, using error correction coding, targets parity data to specific word lines or multilevel cells based on occupancy tracking, ensuring reliable filling and improving system survivability by placing parity data in distinct locations to avoid common failure points.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional RAID writing methods are used without geometry awareness, then the writing process is simple, but read reliability is reduced due to unfilled word lines and improper parity placement
Solution Approach 1:
The patent applies local quality by targeting parity data to specific word lines or multilevel cells based on occupancy tracking. Instead of uniform parity distribution, the system identifies unfilled word lines and places parity data specifically where needed, ensuring reliable filling while maintaining simplicity in the writing process.
Solution Approach 2:
The system performs preliminary action by tracking occupancy status of word lines and multilevel cells before writing parity data. This advance identification of unfilled word lines allows the system to proactively place parity data in the correct locations, preventing reliability issues before they occur.
2Reliability
If parity data is placed without geometry awareness, then the placement process is simple, but system survivability is reduced due to proximity to failure points
Solution Approach 1:
The patent applies local quality by placing parity data in distinct locations away from common failure points. The system identifies safe zones in the memory geometry and targets parity writing to those locations, enhancing system survivability while maintaining manageable placement complexity through geometry-aware decision making.
Solution Approach 2:
The system converts the potential harm of complex geometry management into a benefit by using occupancy tracking and geometry awareness to identify optimal parity placement locations. This transforms what could be a complex problem into an opportunity to enhance reliability by strategically positioning data away from failure-prone areas.
3Reliability
If word lines are not filled according to flash device requirements, then the writing process is simple, but read reliability is reduced over time
Solution Approach 1:
The system performs preliminary action by tracking occupancy status before writing operations. This allows the system to proactively ensure word lines are properly filled according to flash device requirements, maintaining read reliability over time while optimizing writing efficiency through targeted parity placement.
Solution Approach 2:
The patent implements feedback mechanisms through occupancy tracking that monitors the state of word lines and multilevel cells. This feedback information guides subsequent writing operations to ensure proper filling, maintaining both reliability and efficiency by adapting to the actual state of the storage medium.
Data Source
AI summary
A geometry-aware method of writing parity, performed by a storage system is provided. The method includes writing data, using error correction coding, to a RAID stripe comprising a plurality of allocation units of storage memory of the storage system, and writing one or more parity pages comprising parity data for a block having a portion of the data of the RAID stripe in one of the plurality of allocation units of the RAID stripe to a targeted differing word line of the block or a differing block, the parity data for the block distinct from the error correction coding of the RAID stripe.