Rail Stack Shared Diode for 3D Memory Pillar Fabrication
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Solution Overview
Problem
The formation of pillar structures in three-dimensional non-volatile memory arrays poses challenges due to the need for precise alignment and selective etching, which can lead to inadvertent shorting of adjacent structures and difficulties in fabricating reliable memory cells.
Innovation Solution
The integration of vertically oriented diode structures with a rail stack design, where a portion of the diode is shared between pillars, reducing pillar height and improving fabrication processes by forming part of the diode in the rail stack with one of the conductors, allowing for reduced pillar height without compromising electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If pillar structures are formed using traditional selective etching processes, then memory cell functionality is achieved, but inadvertent shorting of adjacent structures occurs due to stringers formed from trapped material
Solution Approach 1:
The diode structure is segmented into two parts: a first portion formed in the rail stack that is shared by multiple pillars, and a second portion formed in each individual pillar. This segmentation allows the etching process to be more selective and controlled, reducing the formation of stringers that cause shorting while maintaining the necessary electrical connections for memory cell functionality.
Solution Approach 2:
The rail stack serves as an intermediary structure that contains the first portion of the diode and provides a stable, shared foundation for multiple pillars. By placing part of the diode structure in the rail stack rather than entirely within each pillar, the design reduces the complexity of the etching process and minimizes the risk of material trapping and shorting between adjacent pillars.
2Manufacturing precision
If pillar height is reduced to improve fabrication processes, then manufacturing precision is improved, but electrical performance may be compromised
Solution Approach 1:
The first portion of the diode is merged into the rail stack structure, which is a more robust and easier-to-fabricate component. This merging allows the pillar height to be reduced for better manufacturing precision while the electrical function is maintained through the combined structure of the rail stack's first diode portion and the pillar's second diode portion.
Solution Approach 2:
The rail stack serves multiple functions: it provides structural support, contains the first portion of the diode that is shared by multiple pillars, and facilitates easier fabrication processes. This multi-functionality allows the pillar height to be reduced without compromising electrical performance, as the rail stack compensates for the reduced pillar height by providing the necessary electrical pathway.
3Productivity
If precise alignment is required for pillar formation, then memory cell density can be increased, but fabrication complexity increases due to multiple selective etching processes
Solution Approach 1:
The diode structure is distributed across two dimensions: the first portion is formed in the vertically-oriented rail stack, and the second portion is formed in the horizontally-oriented pillar. This dimensional distribution simplifies the fabrication process by allowing different portions of the diode to be formed in separate, more manageable steps, reducing the overall complexity while maintaining high memory cell density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and efficiency of memory cell formation by minimizing disturb issues and maintaining discrete memory cell functionality, while allowing for reduced pillar height, thus improving the fabrication process and memory array density.
Implementation Method 1
Two-terminal devices such as passive element memory cells can include a diode steering element in series with an antifuse and/or other state change element
Data Source
AI summary
An integrated circuit including vertically oriented diode structures between conductors and methods of fabricating the same are provided. Two-terminal devices such as passive element memory cells can include a diode steering element in series with an antifuse and/or other state change element. The devices are formed using pillar structures at the intersections of upper and lower sets of conductors. The height of the pillar structures are reduced by forming part of the diode for each pillar in a rail stack with one of the conductors. A diode in one embodiment can include a first diode component of a first conductivity type and a second diode component of a second conductivity type. A portion of one of the diode components is divided into first and second portions with one on the portions being formed in the rail stack where it is shared with other diodes formed using pillars at the rail stack.


