RAIM Memory ECC Distribution for Lower Overhead Fault Tolerance
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Solution Overview
Problem
Conventional Redundant Array of Independent/Inexpensive Memory (RAIM) designs require excessive resources and overhead for fault-tolerant and error correction functionalities, leading to high power consumption and cost, especially in environments with high integration density or harsh conditions like high altitudes and astronomical radiation.
Innovation Solution
The proposed memory system reduces the number of ECC memory devices by distributing ECC symbols across multiple channels and units of data and ECC DRAM chips, eliminating the need for dedicated ECC DIMMs and optimizing the ratio of data to ECC DRAMs, thereby reducing memory overhead and improving resource efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional RAIM designs use dedicated ECC DIMMs and additional ECC memory devices to provide fault-tolerant and error correction functionalities, then reliability and fault-tolerance are improved, but device complexity and resource overhead increase
Solution Approach 1:
The patent combines data and ECC memory devices into integrated memory modules, eliminating dedicated ECC DIMMs. Each memory module contains both data memory devices and ECC memory devices that work together as a unified system, reducing overall device complexity while maintaining fault-tolerance capabilities
Solution Approach 2:
The ECC memory devices serve multiple functions: they provide error correction for data in the same memory module, enable RAIM functionalities across multiple channels, and support various RAS features. This multi-functionality reduces the need for separate dedicated ECC components
2Reliability
If conventional RAIM designs allocate additional ECC memory devices per channel to support RAIM functionalities, then error correction capability is improved, but power consumption increases
Solution Approach 1:
The patent segments ECC functionality into distributed ECC memory devices across multiple memory modules and channels. Instead of concentrating ECC resources in dedicated DIMMs, the ECC capability is segmented and distributed throughout the memory system, allowing for more efficient power utilization
Solution Approach 2:
The system uses a predetermined number of ECC symbols that may be fewer than traditional designs would allocate per channel, yet still provides sufficient error correction capability. This partial action approach reduces power consumption while maintaining adequate error correction for the application requirements
3Reliability
If conventional RAIM designs use more ECC memory devices to ensure robustness in harsh environments, then reliability under harsh conditions is improved, but cost increases
Solution Approach 1:
The patent changes the organizational parameters of memory devices, transitioning from dedicated ECC DIMMs to integrated memory modules with specific ratios of data to ECC devices. This parameter change optimizes the balance between reliability and quantity of components
Solution Approach 2:
The system uses an asymmetric distribution of ECC symbols across channels, with a predetermined number of ECC symbols allocated to support RAIM functionalities. This asymmetric allocation optimizes component usage while maintaining robustness against errors in harsh environments
4Reliability
If conventional RAIM designs allocate dedicated ECC DIMMs for each channel to support RAIM functionalities, then fault-tolerance is improved, but memory bandwidth efficiency decreases
Solution Approach 1:
By merging data and ECC memory devices into unified memory modules with integrated interfaces, the system eliminates the overhead of separate dedicated ECC DIMM communications. This consolidation improves memory bandwidth efficiency while maintaining fault-tolerance through the combined operation of data and ECC devices within each module
Data Source
AI summary
A memory system includes memory modules having a number of sets of memory devices including data memory devices for data and error correction code (ECC). The ECC memory devices carry ECC symbols for the memory modules. A host receives and decodes the ECC symbols and executes error correction operations. The host and the memory modules are coupled by a number of channels.


