3D Memory Array RAIN Parity Distribution
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Solution Overview
Problem
Existing redundant array of independent NAND (RAIN) protection schemes for three-dimensional memory arrays have high overhead density, reducing the amount of memory available for user data while providing similar protection levels, as the parity portion often occupies a significant portion of the memory array.
Innovation Solution
A three-dimensional memory array design with a lower overhead density RAIN protection scheme, where the parity portion of the RAIN stripe in each page comprises only a portion of that page, allowing for a smaller dedicated RAIN area while maintaining similar protection levels by utilizing a tile group structure with stair step structures and parallel string drivers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a traditional RAIN protection scheme is used with parity portion occupying a significant portion of the memory array, then data protection level is maintained, but overhead density increases and user data storage capacity decreases
Solution Approach 1:
The memory array is divided into multiple tile groups, where each tile group contains a portion of the RAIN stripe and associated parity. This segmentation allows the parity to be distributed across different tile groups rather than requiring a large contiguous parity region, thereby reducing the overhead density while maintaining the same level of data protection through distributed redundancy.
2Reliability
If the parity portion occupies a significant portion of the memory array, then data protection is ensured, but the amount of memory available for user data is reduced
Solution Approach 1:
The patent transitions from a two-dimensional memory layout to a three-dimensional stacked memory architecture with multiple tiers. By organizing RAIN stripes and parity across vertical tiers and horizontal tile groups, the system can achieve the same protection level with reduced overhead density, as the parity is distributed across multiple dimensional layers rather than occupying a large area in a single plane.
Data Source
AI summary
The present disclosure includes a redundant array of independent NAND for a three dimensional memory array. A number of embodiments include a three-dimensional array of memory cells, wherein the array includes a plurality of pages of memory cells, a number of the plurality of pages include a parity portion of a redundant array of independent NAND (RAIN) stripe, and the parity portion of the RAIN stripe in each respective page comprises only a portion of that respective page.