Semiconductor Package With Raised Die Paddle and Conductive Posts

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Solution Overview

Problem

Semiconductor devices face challenges in effectively dissipating heat and achieving vertical electrical interconnects, particularly due to the expensive and complex process of forming deep vias using mechanical drilling, laser drilling, or deep reactive ion etching.

Innovation Solution

A method involving a substrate with a raised die area and conductive posts is used, where a semiconductor die is placed over the die area between the conductive posts, encapsulated, and an interconnect structure is formed over the encapsulant, with the conductive posts being electrically connected to the interconnect structure, and the raised die paddle acts as a heat sink for heat dissipation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If deep vias are formed using mechanical drilling, laser drilling, or deep reactive ion etching to achieve vertical electrical interconnects, then vertical electrical interconnection is accomplished, but manufacturing cost and process complexity increase significantly

Engineering Contradiction:
Improvevertical electrical interconnectVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The substrate is divided into separate conductive bodies that extend from the base, eliminating the need to form deep vias through the entire substrate thickness. Each conductive body serves as an independent vertical interconnect element, simplifying the manufacturing process while achieving the required electrical connection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The conductive bodies are pre-formed as integral parts of the substrate structure before the packaging process. This preliminary formation of conductive interconnect elements eliminates the need for subsequent expensive and complex deep via formation steps, while ensuring reliable vertical electrical connection.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If the substrate structure is simplified to reduce manufacturing complexity, then manufacturing cost decreases, but heat dissipation capability may be compromised

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidheat dissipation
Core Design Contradiction:
Device complexityVSTemperature

Solution Approach 1:

The conductive bodies serve dual functions: they provide vertical electrical interconnection and act as heat sinks for thermal management. This multi-functionality allows the simplified substrate structure to simultaneously achieve both electrical connectivity and effective heat dissipation without requiring separate complex systems.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The conductive bodies inherently provide both electrical conduction and thermal conduction functions without requiring additional components. The same structural elements that establish electrical interconnect automatically serve as heat dissipation pathways, eliminating the need for separate thermal management systems.

Inventive Principle:
Principle #25Self-service

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient heat dissipation and vertical electrical interconnects, reducing manufacturing costs and complexity by eliminating the need for deep via formation, while maintaining package integrity and robustness.

Implementation Method 1

the raised die paddle acts as a heat sink for heat dissipation

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9064859B2Semiconductor device and method of forming conductive posts and heat sink over semiconductor die using leadframe
Publication Date: 2015.06.23 JCET SEMICON (SHAOXING) CO LTD
  • US9064859B2 patent drawing
  • US9064859B2 patent drawing
  • US9064859B2 patent drawing

AI summary

A semiconductor device has a prefabricated multi-die leadframe with a base and integrated raised die paddle and a plurality of bodies extending from the base. A thermal interface layer is formed over a back surface of a semiconductor die or top surface of the raised die paddle. The semiconductor die is mounted over the raised die paddle between the bodies of the leadframe with the TIM disposed between the die and raised die paddle. An encapsulant is deposited over the leadframe and semiconductor die. Vias can be formed in the encapsulant. An interconnect structure is formed over the leadframe, semiconductor die, and encapsulant, including into the vias. The base is removed to separate the bodies from the raised die paddle. The raised die paddle provides heat dissipation for the semiconductor die. The bodies are electrically connected to the interconnect structure. The bodies operate as conductive posts for electrical interconnect.