Raised Front-Side Pads in Chip Scale Packages for PCB Soldering
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Solution Overview
Problem
Conventional chip scale power semiconductor packages with flat pads face issues in PCB level soldering, leading to a higher chance of being peeled off, and require improvements in wettable area and under-fill process space during solder reflow.
Innovation Solution
The introduction of raised front side pads comprising a copper member and a solder member, along with a thick metal layer of 25-50 microns, enhances soldering reliability and mechanical strength, and optional molding compound layers improve electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If flat pads are used in conventional chip scale power semiconductor packages, then the manufacturing process is simple, but the PCB level soldering reliability is poor and the package is prone to being peeled off
Solution Approach 1:
The invention transitions from flat two-dimensional pads to three-dimensional raised pads with copper members extending vertically from the substrate. This dimensional change increases the wettable surface area for soldering and provides additional mechanical anchoring, thereby improving soldering reliability without significantly complicating the manufacturing process
Solution Approach 2:
The raised pads are constructed using composite material structures combining copper members (for electrical conductivity and mechanical strength) with solder members (for bonding to PCB). This composite approach enhances both the electrical performance and mechanical reliability of the solder joint while maintaining manufacturing feasibility
2Quantity of substance
If flat pads are used, then the manufacturing process is simple, but the wettable area during solder reflow is insufficient
Solution Approach 1:
By raising the pads vertically with copper members extending from the substrate surface, the invention creates additional lateral surface area that is exposed to solder during reflow. This three-dimensional structure provides significantly more wettable area compared to flat pads, improving solder joint formation without requiring complex multi-layer structures
3Area of stationary object
If flat pads are used, then the package structure is simple, but the space for under-fill process is insufficient
Solution Approach 1:
The raised pad structure creates vertical clearance between the pad surface and the PCB mounting surface, generating additional space for under-fill material to flow and stabilize the package. This dimensional elevation provides the necessary gap for under-fill application without requiring lateral expansion of the package footprint
4Reliability
If thin metal layer is used, then the manufacturing cost is low, but the electrical performance is insufficient
Solution Approach 1:
The invention optimizes the metal layer thickness parameter to a specific range (25-50 microns) that balances electrical performance requirements with manufacturing feasibility. This parameter adjustment ensures sufficient electrical conductivity and current carrying capacity while remaining compatible with standard metallization processes
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The raised pads increase the wettable area and space for the under-fill process, improving soldering reliability and mechanical strength, thereby reducing the chances of the package being peeled off from the PCB.
Implementation Method 1
Each of the raised pads comprises a copper member and a solder member thereby increasing wettable area during a solder reflow process
Implementation Method 2
applying a photolithography process
Implementation Method 3
applying a front side copper plating process
Implementation Method 4
applying a front side solder plating process
Data Source
AI summary
A chip scale semiconductor package comprises a silicon layer, a back side metal layer, and a plurality of front side pads. Each of the plurality of front side pads comprises a respective copper member and a respective solder member. A method comprises the steps of: providing a wafer; grinding the back side of the wafer forming a peripheral ring; applying a metallization process to a grinded surface; removing the peripheral ring; forming a front side seed layer; forming a front side photoresist layer; applying a photolithography process; applying a front side copper plating process; applying a front side solder plating process; stripping the front side photoresist layer; etching the front side seed layer; and applying a singulation process.