Raised Surface Power Corridors for Low-Layer Package Substrates

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Solution Overview

Problem

The reduction in size of mobile electronic devices requires smaller system-in-package components, specifically reducing the Z-height of semiconductor packages, while existing technologies face challenges in minimizing package layer counts without compromising power delivery performance.

Innovation Solution

The implementation of raised electrical conductors, or power corridors, on the surface of the package substrate replaces internal power planes, using metal deposition techniques to enhance power delivery and reduce the equivalent series resistance (ESR) by routing power delivery externally, thereby minimizing the number of layers needed within the package.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If internal power planes are used within the package substrate, then power delivery performance is maintained, but the number of layers increases and Z-height increases

Engineering Contradiction:
Improvepower delivery performanceVSAvoidpackage layer count
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent transitions power delivery from internal substrate layers to the external surface dimension by forming raised electrical conductors on the package substrate surface. This dimensional shift eliminates the need for dedicated internal power planes while maintaining power delivery capability, thereby reducing layer count without sacrificing performance

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention extracts the power delivery function from the internal substrate structure and relocates it to the external surface through raised conductors. This separation allows the substrate internal layers to be reduced or eliminated while power delivery continues through the external conductor network

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If internal power planes are used within the package substrate, then power delivery performance is maintained, but Z-height increases

Engineering Contradiction:
Improvepower delivery performanceVSAvoidZ-height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

By moving power delivery to the external surface dimension rather than consuming internal Z-space for power planes, the patent achieves reduced Z-height while maintaining power delivery through the raised conductor configuration

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If the number of layers is reduced, then costs decrease and supply-chain constraints are addressed, but power delivery performance may deteriorate

Engineering Contradiction:
Improvemanufacturing costVSAvoidpower delivery performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent changes the physical parameters of the conductors by raising them from the substrate surface, creating three-dimensional power corridors with optimized cross-sectional area and path. This parameter change enables reduced layer count while maintaining low ESR and effective power delivery

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces package layer counts, decreases costs, and addresses supply-chain constraints by improving power delivery performance while maintaining or enhancing the load line, thus achieving a smaller Z-height without deteriorating power delivery.

Implementation Method 1

using metal deposition techniques to enhance power delivery and reduce the equivalent series resistance (ESR)

Methodology Applied
Scientific EffectMetal deposition: Deposition (physical)

Data Source

PatentUS20230420354A1Electrical conductor extending from a surface of a substrate
Publication Date: 2023.12.28 INTEL CORP
  • US20230420354A1 patent drawing
  • US20230420354A1 patent drawing
  • US20230420354A1 patent drawing

AI summary

Embodiments herein relate to systems, apparatuses, techniques, or processes directed to an electrical conductor, or power corridor, on the outside of a package substrate, wherein the electrical conductor is raised, or extends from a surface of the package substrate. In embodiments, this electrical conductor may be used to reduce the number of layers required within the package substrate by removing power planes within the substrate to the electrical conductors on the surface of the package. Other embodiments may be described and/or claimed.