Raised Source/Drain Epitaxial Doping for Low Contact Resistance

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Solution Overview

Problem

In semiconductor devices, particularly in MOSFETs, the reduction of channel length leads to high contact resistance, which limits drive currents due to the dominance of external resistance, and current manufacturing techniques face challenges in maintaining high dopant concentration without inducing short channel effects.

Innovation Solution

A semiconductor device is fabricated with a low resistance contact region by forming a raised source/drain region using epitaxial-grown doped layers with increasing germanium and dopant concentrations, and a doped region with a higher dopant concentration is created to reduce contact resistance while preventing dopant diffusion into the channel region.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of moving object

If the channel length is reduced to improve device scaling and performance, then the device size decreases and integration density increases, but the contact resistance increases and dominates the external resistance

Engineering Contradiction:
Improvechannel lengthVSAvoidcontact resistance
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent applies local quality by creating a raised source/drain region with higher dopant concentration specifically at the contact area, while maintaining lower dopant concentration in the channel region. This localized dopant enhancement reduces contact resistance without inducing short channel effects in the channel, directly resolving the contradiction between reduced channel length and increased contact resistance.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs preliminary action by forming the raised source/drain region with elevated dopant concentration before final contact formation. This pre-established low-resistance region ensures that when contacts are made, the contact resistance is already minimized, addressing the contact resistance issue that arises from channel length reduction.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If the dopant concentration is increased to reduce contact resistance and improve drive currents, then the external resistance decreases, but short channel effects are induced

Engineering Contradiction:
Improvecontact resistanceVSAvoidshort channel effects
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent implements local quality by spatially differentiating dopant concentration: high dopant concentration is confined to the raised source/drain region at the contact area to reduce contact resistance, while the channel region maintains lower dopant concentration to avoid short channel effects. This localized approach allows simultaneous optimization of both parameters.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the source/drain structure into two distinct regions: a raised region with high dopant concentration for low contact resistance, and a channel-adjacent region with lower dopant concentration to prevent short channel effects. This segmentation allows independent optimization of dopant concentration in each region, resolving the contradiction between reducing contact resistance and avoiding short channel effects.

Inventive Principle:
Principle #1Segmentation

3Productivity

If the external resistance is reduced to improve device drive currents, then the performance increases, but the manufacturing complexity increases due to the need for precise dopant concentration control

Engineering Contradiction:
Improvedrive currentsVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses preliminary action by forming the raised source/drain region with high dopant concentration during the epitaxial growth process itself, before subsequent processing steps. This integrates dopant incorporation into the structural formation, reducing the need for separate, complex dopant introduction steps and simplifying manufacturing while achieving low external resistance for high drive currents.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies parameter changes by utilizing epitaxial growth conditions (temperature, pressure, gas flow, dopant supply) to precisely control dopant concentration profiles during source/drain region formation. By adjusting these parameters, the manufacturing process achieves the required dopant concentration gradients without additional complex processing steps, thereby improving drive currents while managing manufacturing complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach significantly reduces external resistance, enhancing drive currents and preventing short channel effects, thereby improving device performance without compromising dopant concentration.

Implementation Method 1

forming a raised source/drain region using epitaxial-grown doped layers

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS9490345B2Semiconductor device and manufacturing method thereof
Publication Date: 2016.11.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9490345B2 patent drawing
  • US9490345B2 patent drawing
  • US9490345B2 patent drawing

AI summary

A semiconductor device includes a gate structure on a substrate; a raised source/drain region adjacent to the gate structure; and an interconnect plug on the doped region. The raised source/drain region includes a top surface being elevated from a surface of the substrate; and a doped region exposed on the top surface. The doped region includes a dopant concentration greater than any other portions of the raised source/drain region. A bottommost portion of the interconnect plug includes a width approximate to a width of the doped region.