RAM Alias Linking for Shared Instruction and Data Memory

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Solution Overview

Problem

The challenge of efficiently allocating instructions and data in a single physical RAM device with separate address spaces in existing technologies has not been addressed, particularly in the context of Harvard architecture where separate busses are used for instructions and data, leading to potential corruption and inefficient memory usage.

Innovation Solution

A linker script is used to track and adjust address ranges in a common memory device, ensuring that instructions and data are correctly allocated without overlap, utilizing aliased addresses to manage separate busses for instructions and data access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a single physical RAM device is used to store both instructions and data, then memory space is saved and integration is improved, but address space conflict and data corruption occur

Engineering Contradiction:
Improvememory spaceVSAvoiddata integrity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent divides the address space into two separate ranges: a first address range for instructions and a second address range for data. Although both ranges map to the same physical RAM device, this logical segmentation prevents address conflicts and ensures that instructions and data are accessed through distinct address spaces, eliminating data corruption while maintaining unified memory storage.

Inventive Principle:
Principle #1Segmentation

2Reliability

If separate address spaces are created for instructions and data in the same physical memory device, then data corruption is prevented, but memory allocation complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoidmemory allocation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The linker script serves as an intermediary mechanism that automatically manages the complex task of allocating memory spaces. It processes the linker script to determine the first address range for instructions and the second address range for data, calculating offset values to ensure proper spacing. This intermediary tool handles the complexity of coordinate management between two address spaces mapping to the same physical device, simplifying the overall system.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If the linker manually manages address ranges for instructions and data, then precise memory allocation is achieved, but processing time and complexity increase

Engineering Contradiction:
Improvememory allocation precisionVSAvoidprocessing time
Core Design Contradiction:
Manufacturing precisionVSLoss of time

Solution Approach 1:

The linker script enables the linker to automatically manage memory allocation without manual intervention. The linker script contains predefined configurations and offset calculations that allow the linker to self-determine the correct address ranges for instructions and data. This self-service approach eliminates time-consuming manual coordination while maintaining precise memory allocation, as the linker independently processes the script to generate accurate address assignments.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS20250370920A1Linking RAM Code and Data with Multiple RAM Aliases
Publication Date: 2025.12.04 SILICON LABORATORIES INC
  • US20250370920A1 patent drawing
  • US20250370920A1 patent drawing
  • US20250370920A1 patent drawing

AI summary

A system and method for allocating instructions and data in a common memory device that uses aliased addresses is disclosed. The linker uses a linker script that tracks the amount of space that is allocated in the common memory device. It then uses this information to properly adjust the starting addresses for the different address ranges to ensure that no information is overwritten or corrupted. This technique allows instructions to be disposed in the same memory device as other data, but be accessed using an aliased address. This is particularly beneficial for processing units that utilize different busses for instructions and data.