RAM Bitline Truncation for Lower-Power Precision Memory Access

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Solution Overview

Problem

Existing data storage and processing systems face challenges in efficiently managing power consumption while maintaining computational accuracy, particularly in applications like machine learning and video streaming, due to the need for high bit precision which consumes significant energy.

Innovation Solution

Implementing a random access memory (RAM) system with flexible bit truncation capabilities, where a truncation manager controls bitline power and output, allowing selective truncation of least significant bits (LSBs) based on application requirements, reducing power consumption without degrading data quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high bit precision is used in data storage and processing, then computational accuracy is maintained, but power consumption increases significantly

Engineering Contradiction:

Improvecomputational accuracyVSAvoidpower consumption

Core Design Contradiction:

Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements dynamic bit truncation where the number of truncated bits is adjusted based on application requirements. The system can dynamically switch between full precision and truncated precision modes, allowing computational accuracy to be optimized for each specific application while reducing power consumption when full precision is not needed.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system changes the precision parameter by truncating least significant bits (LSBs) of data stored in RAM. By controlling the number of truncated bits, the system can adjust the effective precision of data processing, thereby reducing power consumption while maintaining sufficient computational accuracy for different application scenarios.

Inventive Principle:

Principle #35Parameter changes

2Measurement precision

If full bit precision is maintained in RAM operations, then data quality is preserved, but heat dissipation increases

Engineering Contradiction:

Improvedata qualityVSAvoidheat dissipation

Core Design Contradiction:

Measurement precisionVSTemperature

Solution Approach 1:

The patent applies bit truncation to change the precision parameter of stored data, reducing the number of bits that need to be processed and accessed. This parameter change directly reduces the computational load and associated heat generation while maintaining data quality sufficient for the intended application.

Inventive Principle:

Principle #35Parameter changes

3Use of energy by moving object

If bit truncation is applied to reduce power consumption, then energy efficiency improves, but data precision may be degraded

Engineering Contradiction:

Improveenergy efficiencyVSAvoiddata precision

Core Design Contradiction:

Use of energy by moving objectVSMeasurement precision

Solution Approach 1:

The system dynamically adjusts the truncation level based on application needs. Different applications can specify their required precision, and the system truncates only the necessary number of bits, ensuring energy efficiency is optimized without unnecessarily degrading data precision.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The patent replaces full-precision data processing with truncated precision processing where sufficient. By substituting high-precision operations with lower-precision equivalents that meet application requirements, the system achieves better energy efficiency without significant loss in functional performance.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

4Ease of operation

If all bitlines are activated in RAM array, then complete data access is enabled, but power consumption increases

Engineering Contradiction:

Improvedata access capabilityVSAvoidpower consumption

Core Design Contradiction:

Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent extracts and removes the least significant bits (LSBs) from data before storage or during retrieval operations. By taking out these less critical bits, the system reduces the number of active bitlines needed, thereby reducing power consumption while maintaining sufficient data access capability for the application.

Inventive Principle:

Principle #2Taking out (Extraction)

Data Source

PatentUS20260038586A1Random access memory using flexible bit truncation

Publication Date: 2026.02.05 UNIV OF SOUTH ALABAMA

AI summary

A plurality of random access memory (RAM) cells is accessed. The RAM cells are arranged in an array and include bitlines and wordlines. The bitlines and wordlines are functionally accessible for data storage and retrieval. The accessibility is based on logic circuitry coupled to the array and to power inputs, address inputs, control inputs, and data inputs and outputs. A truncation manager is coupled to the array for controlling the bitlines. The truncation manager selectively controls bitline power and bitline data output. Bitline power header devices are coupled to the array. The bitline power header devices selectively distribute power along each of the bitlines. Bitline output multiplexors are coupled to the array. The bitline output multiplexors selectively couple the bitlines to the data outputs. The truncation manager controls a plurality of truncation logic units.