RAM ECC Self-Diagnosis for Latent Fault Detection
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Solution Overview
Problem
Existing systems fail to effectively monitor and correct latent faults in error correction code units of data memories, particularly in safety-critical applications, as they only check for permanent errors during system startup and not during ongoing operations.
Innovation Solution
An electronic circuit and method that utilizes existing error correction code (ECC) and check (ECCCHK) units to monitor each other by comparing generated and stored ECC codes during both write and read cycles, using multiplexers to feed these units with data and ECC codes, and setting latent fault flags for any mismatches, allowing for continuous safety checks without additional hardware or time delay.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external test equipment is used to test memory devices, then measurement precision is improved, but device complexity and test cost increase
Solution Approach 1:
The patent merges the test equipment functionality directly into the memory device by integrating a test logic unit within the memory array structure. The test bit lines are combined with the normal bit lines, and the same read/write circuits serve dual purposes for both normal operation and self-diagnosis, eliminating the need for separate external test equipment.
Solution Approach 2:
The memory device performs self-diagnosis through an integrated test logic unit that can autonomously activate test modes, apply test patterns, and detect defects without requiring external test equipment. The memory device serves its own testing needs by utilizing its existing read/write circuits and control logic for both operational and diagnostic functions.
2Measurement precision
If external test equipment is used for memory diagnosis, then measurement precision is improved, but loss of time increases due to additional equipment setup
Solution Approach 1:
The test functionality is merged with the operational functionality by using the same read/write circuits, bit lines, and control logic for both normal memory operations and self-diagnosis. This integration eliminates the need for separate test equipment setup and allows immediate transition between operational and diagnostic modes.
Solution Approach 2:
The memory device autonomously performs self-diagnosis without requiring external equipment setup. The test logic unit within the memory can be activated to perform self-tests, and the device uses its own existing circuits and control mechanisms to conduct the diagnosis, thereby eliminating setup time associated with external test equipment.
3Ease of operation
If complex test logic is integrated into the memory device, then ease of operation is improved, but device complexity increases
Solution Approach 1:
The read/write circuits and control logic are designed to serve multiple functions: normal memory read/write operations and self-diagnosis operations. The same circuits can be activated for different purposes based on control signals, reducing the need for separate dedicated test circuits and minimizing overall device complexity while maintaining ease of self-diagnosis operation.
Solution Approach 2:
The test logic is segmented into modular components distributed throughout the memory array, with test control logic, test data lines, and test read/write circuits distributed across different memory blocks. This segmentation allows the self-diagnosis functionality to be integrated without creating a single complex centralized test unit, thereby improving ease of operation while managing device complexity through distributed architecture.
Data Source
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AI summary
An electronic circuit and method for self-diagnosis of a data memory (RAM) is described comprising/using a first error correction code unit (ECCGEN1) for generating an error correction code (ECCIN) from user data (DIN) to be written into the data memory (RAM). The electronic circuit is arranged to feed the user data (DIN) written into the memory and the related error correction code (ECCIN) into the error check unit (ECCCHK/CORR) in the write cycle when writing the user data and the related error correction code (ECCIN) into the data memory (RAM) to provide a Latent_Fault flag in case of a determined difference between the error correction code (ECCIN) and the countercheck code (CCCIN) calculated from the user data (DIN) by the error check unit (ECCCHK/CORR).