Resistive RAM Filament Formation Region Design
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Solution Overview
Problem
Current non-volatile memory devices face challenges such as high programming voltage requirements, dielectric breakdown, and scalability issues as device sizes shrink, and many alternative memory technologies are incompatible with silicon-based fabrication techniques or lack essential attributes like reliability and low power consumption.
Innovation Solution
A resistive switching device structure and method are developed, featuring a substrate with dielectric materials and electrodes, where a resistive switching material with a planar and indent structure is formed to create a conductive filament at a low operating voltage, enabling robust and scalable non-volatile memory performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If conventional non-volatile memory devices are scaled down to smaller sizes, then device density is improved, but programming voltage requirements increase and dielectric breakdown occurs
Solution Approach 1:
The patent changes the fundamental switching mechanism from charge-based (voltage-dependent) to resistance-based (material property-dependent). By using phase change material and forming resistive filaments, the device achieves switching at low voltages independent of device size, resolving the contradiction between scaling and programming voltage stability
Solution Approach 2:
The patent replaces the traditional FET-based mechanical/electrical switching mechanism with a material-based resistive switching mechanism. The conductive filament formation in the resistive switching material provides a size-independent switching mechanism that eliminates dielectric breakdown issues associated with scaling conventional memory devices
2Speed
If alternative memory technologies are used to achieve fast switching and good programming endurance, then switching performance is improved, but compatibility with silicon-based fabrication techniques deteriorates
Solution Approach 1:
The patent introduces a localized indent structure within the resistive switching material that creates a preferred filament formation region. This local structural modification enables fast switching and good endurance while using standard silicon-compatible materials and fabrication processes, resolving the contradiction between performance and manufacturability
Solution Approach 2:
The patent uses a composite structure combining dielectric material with embedded resistive switching material and metal particles. This composite approach achieves the fast switching and endurance of advanced memory technologies while maintaining compatibility with existing silicon-based fabrication techniques
3Reliability
If PCRAM devices are used to achieve non-volatile memory functionality, then memory capability is improved, but power consumption increases due to Joules heating
Solution Approach 1:
The patent extracts and eliminates the Joules heating mechanism from the switching process. By using conductive filament formation and rupture in the resistive switching material instead of resistive heating, the device achieves non-volatile memory functionality with significantly reduced power consumption
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for low-voltage programming, improved endurance, and fast switching with the ability to maintain multiple resistive states, facilitating high-density memory devices at reduced costs, suitable for various applications including data storage and consumer electronics.
Implementation Method 1
forming a conductive filament at a low operating voltage
Implementation Method 2
forming a resistive switching material overlying the second dielectric material and filling at least a portion of the opening structure using a deposition process
Data Source
AI summary
A non-volatile memory device includes a first dielectric on a substrate, a first electrode disposed on the first dielectric, a second dielectric material disposed next to the first electrode, a patterned material disposed upon the second dielectric material and in contact with part of the first electrode, a third dielectric material disposed next to the patterned material and in contact with another part of the first electrode, wherein the patterned material and the third dielectric material contact at an interface region, wherein the interface region is characterized by a plurality of defects, a second electrode disposed on the patterned material, on the third dielectric, and on the interface region, wherein the second electrode comprises metal particles that are configured to be diffused within the interface region upon application of a bias voltage, and wherein metal particles are disposed within the plurality of defects in the interface region.