Dynamic RAM Flash Allocation for Processor Power Optimization
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Solution Overview
Problem
Current communications systems face a tradeoff between power consumption and network throughput, with RAM size being a critical factor, as reducing power consumption without compromising performance is challenging, especially in IoT and embedded systems.
Innovation Solution
A method and apparatus that dynamically allocate executable code between RAM and flash memory using a function pointer table, where the CPU executes boot code from flash ROM, initializes a powersave code in RAM, and adjusts the allocation based on RAM utilization ratios to optimize power consumption by moving code between RAM and flash ROM.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If RAM size is reduced to lower power consumption, then power consumption decreases, but network throughput capability is compromised
Solution Approach 1:
The patent implements dynamic memory allocation where the system continuously monitors RAM utilization and adjusts the boundary between static and transient memory regions accordingly. When RAM utilization is high, more memory is allocated to transient data; when utilization is low, more memory is allocated to static code and data. This dynamic adjustment allows the system to maintain optimal performance while minimizing power consumption by keeping the RAM size small but efficiently utilizing it when needed.
Solution Approach 2:
The system changes the allocation parameters of memory regions based on runtime conditions. The boundary between static and transient memory regions is not fixed but can be adjusted by modifying the utilization ratio threshold and reallocating memory segments. This parameter change enables the system to adapt to varying workload requirements while maintaining a small overall RAM size for power savings.
2Use of energy by moving object
If executable code is stored in flash memory to reduce power consumption, then power consumption decreases, but execution speed is reduced
Solution Approach 1:
The patent applies local quality by storing different types of code in different memory locations with appropriate characteristics. Frequently executed code and code requiring fast execution is placed in RAM, while less frequently accessed code remains in flash memory. The function pointer table dynamically directs execution to the appropriate memory location based on current requirements, ensuring that critical code executes from fast RAM while maintaining power savings by keeping code in flash when not actively needed.
3Productivity
If more RAM is allocated for transient data storage to improve network throughput, then network throughput increases, but power consumption increases
Solution Approach 1:
The system dynamically adjusts the amount of RAM allocated to transient data based on actual network throughput requirements. The powersave code monitors the utilization of the transient memory region and adjusts the allocation by modifying the boundary between static and transient regions. This ensures that RAM is fully utilized only when network throughput demands are high, and minimized when demands are low, thereby optimizing the tradeoff between performance and power consumption.
Data Source
AI summary
The present invention is an controller for dynamically allocating RAM between powersave code copied from ROM and transient RAM memory used for storing packets. When the utilization of the transient RAM memory is low, code segments are copied from ROM and executed from RAM using a RAM pointer table which is updated after the code segments are copied over from ROM, and when the utilization of the transient RAM memory is high, code segments are deallocated from RAM and the pointer table is updated to point to the corresponding location in flash ROM.